From: Jan Kotas <jank@cadence.com>
To: Marc Gonzalez <marc.w.gonzalez@free.fr>
Cc: Jan Kotas <jank@cadence.com>,
linux-media <linux-media@vger.kernel.org>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/3] media: Add lane checks for Cadence CSI2TX
Date: Thu, 18 Jul 2019 12:07:09 +0000 [thread overview]
Message-ID: <9CAC42FF-30B1-4540-B58B-82A81353D37C@global.cadence.com> (raw)
In-Reply-To: <0fea09d4-1e8a-b9bf-b549-ee7cd72bd814@free.fr>
> On 18 Jul 2019, at 13:52, Marc Gonzalez <marc.w.gonzalez@free.fr> wrote:
>
> EXTERNAL MAIL
>
>
> On 18/07/2019 13:15, Jan Kotas wrote:
>
>> This patch adds line checks for CSI2TX, to prevent
>> clock lane being used as a data lane.
>
> "line checks" or "lane checks? ^_^
Yes, you’re right, should be lane checks :)
Regards,
Jan
>
> NB: commit messages may be up to 72-character-wide ;-)
> (No need to line-wrap at 50)
>
> Regards.
next prev parent reply other threads:[~2019-07-18 12:07 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-18 11:15 [PATCH 0/3] media: Add support for Cadence CSI2TX version 2.1 Jan Kotas
2019-07-18 11:15 ` [PATCH 1/3] media: dt-bindings: Update bindings " Jan Kotas
2019-07-20 8:26 ` Maxime Ripard
2019-07-18 11:15 ` [PATCH 2/3] media: Add lane checks for Cadence CSI2TX Jan Kotas
2019-07-18 11:52 ` Marc Gonzalez
2019-07-18 12:07 ` Jan Kotas [this message]
2019-07-20 8:26 ` Maxime Ripard
2019-07-18 11:15 ` [PATCH 3/3] media: Add support for Cadence CSI2TX 2.1 Jan Kotas
2019-07-20 8:25 ` Maxime Ripard
2019-07-22 7:07 ` Jan Kotas
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