From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B3F3C73C66 for ; Sun, 14 Jul 2019 07:01:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 341EE2064A for ; Sun, 14 Jul 2019 07:01:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1563087665; bh=adBrjHSpkk22mnLLbl/iv2929KizSrVFZ5lreBod0hA=; h=References:In-Reply-To:From:Date:Subject:To:Cc:List-ID:From; b=YQGg4jPQUI3BShuZv5tefSHlimqGGV0AvCLtkQh7H8qFiUeLqwtOZPE7skWIR0ZqN anLpQ9gQ1gNpNzITPbub3tiTLn7bXRLha6Ob+8THsc8FoFW2lYBR1MLNBZCmf1+6/z yrUv+bx2l9AHOJHn2u5IvPfYlAUzvFSXQeeEmo+0= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726227AbfGNHBE (ORCPT ); Sun, 14 Jul 2019 03:01:04 -0400 Received: from mail.kernel.org ([198.145.29.99]:35434 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725958AbfGNHBE (ORCPT ); Sun, 14 Jul 2019 03:01:04 -0400 Received: from mail-wr1-f45.google.com (mail-wr1-f45.google.com [209.85.221.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 65C9A2064A for ; Sun, 14 Jul 2019 07:01:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1563087663; bh=adBrjHSpkk22mnLLbl/iv2929KizSrVFZ5lreBod0hA=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=ZaiE02rqd6G1ZfKrkA/mfUKEUS+ISsBIh9IAg0HongEUxTgbx2ozIkv0Nvq7WspTu lOgaoK0tgxoXP+EwKXh0POA16C6XUD/lEK1EksJZEVNE75FnTKaH91nIcllyFQBg+V dD38LXjoJ9h0iaF81Wqt6jtJhvnPEKXtCJfkASaU= Received: by mail-wr1-f45.google.com with SMTP id g17so13809676wrr.5 for ; Sun, 14 Jul 2019 00:01:03 -0700 (PDT) X-Gm-Message-State: APjAAAXAQ5ud6VqpbqILb7Y9ryyOF/nxB2qH9kQbdaQQUcTg7vPMpcHh g0yPhEpv5pjHKZeOvPnuyHExmUrRFjgKgXuup2Q= X-Google-Smtp-Source: APXvYqwvuEQL8FEpumbvIIJm+cxQ5xe4+F60oXxmbyI8CcmjYg+8gQiJWbyNuLyDYFCJyMYz7zY5tM//mPwRq4LcVkY= X-Received: by 2002:a5d:50d1:: with SMTP id f17mr19352083wrt.124.1563087662038; Sun, 14 Jul 2019 00:01:02 -0700 (PDT) MIME-Version: 1.0 References: <20190712224700.11285-1-sean@mess.org> <20190712224700.11285-3-sean@mess.org> In-Reply-To: <20190712224700.11285-3-sean@mess.org> From: Sean Wang Date: Sun, 14 Jul 2019 00:00:50 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 3/3] media: mtk-cir: lower de-glitch counter for rc-mm protocol To: Sean Young Cc: linux-media@vger.kernel.org, Matthias Brugger , Sean Wang , "moderated list:ARM/Mediatek SoC support" , Ryder Lee , Frank Wunderlich Content-Type: text/plain; charset="UTF-8" Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org On Fri, Jul 12, 2019 at 3:47 PM Sean Young wrote: > > The rc-mm protocol can't be decoded by the mtk-cir since the de-glitch > filter removes pulses/spaces shorter than 294 microseconds. > > Tested on a BananaPi R2. Thanks for grabbing the board and do the test voluntarily. > > Signed-off-by: Sean Young Acked-by: Sean Wang > --- > drivers/media/rc/mtk-cir.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/media/rc/mtk-cir.c b/drivers/media/rc/mtk-cir.c > index 9dc467ebae24..8027181de985 100644 > --- a/drivers/media/rc/mtk-cir.c > +++ b/drivers/media/rc/mtk-cir.c > @@ -35,6 +35,11 @@ > /* Fields containing pulse width data */ > #define MTK_WIDTH_MASK (GENMASK(7, 0)) > > +/* IR threshold */ > +#define MTK_IRTHD 0x14 > +#define MTK_DG_CNT_MASK (GENMASK(12, 8)) > +#define MTK_DG_CNT(x) ((x) << 8) > + > /* Bit to enable interrupt */ > #define MTK_IRINT_EN BIT(0) > > @@ -400,6 +405,9 @@ static int mtk_ir_probe(struct platform_device *pdev) > mtk_w32_mask(ir, val, ir->data->fields[MTK_HW_PERIOD].mask, > ir->data->fields[MTK_HW_PERIOD].reg); > > + /* Set de-glitch counter */ > + mtk_w32_mask(ir, MTK_DG_CNT(1), MTK_DG_CNT_MASK, MTK_IRTHD); > + > /* Enable IR and PWM */ > val = mtk_r32(ir, MTK_CONFIG_HIGH_REG); > val |= MTK_OK_COUNT(ir->data->ok_count) | MTK_PWM_EN | MTK_IR_EN; > -- > 2.21.0 > > > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek