Configure video PAL decoder into media pipeline

From: Jagan Teki <jagan@amarulasolutions.com>
To: Mauro Carvalho Chehab <mchehab@kernel.org>,
	linux-media <linux-media@vger.kernel.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	Lars-Peter Clausen <lars@metafoo.de>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Subject: Configure video PAL decoder into media pipeline
Date: Fri, 7 Dec 2018 17:21:00 +0530	[thread overview]
Message-ID: <CAMty3ZAa2_o87YJ=1iak-o-rfZjoYz7PKXM9uGrbHsh6JLOCWw@mail.gmail.com> (raw)

Hi,

We have some unconventional setup for parallel CSI design where analog
input data is converted into to digital composite using PAL decoder
and it feed to adv7180, camera sensor.

Analog input =>  Video PAL Decoder => ADV7180 => IPU-CSI0

The PAL decoder is I2C based, tda9885 chip. We setup it up via dt
bindings and the chip is
detected fine.

But we need to know, is this to be part of media control subdev
pipeline? so-that we can configure pads, links like what we do on
conventional pipeline  or it should not to be part of media pipeline?

Please advise for best possible way to fit this into the design.

Another observation is since the IPU has more than one sink, source
pads, we source or sink the other components on the pipeline but look
like the same thing seems not possible with adv7180 since if has only
one pad. If it has only one pad sourcing to adv7180 from tda9885 seems
not possible, If I'm not mistaken.

I tried to look for similar design in mainline, but I couldn't find
it. is there any design similar to this in mainline?

Please let us know if anyone has any suggestions on this.

Jagan.

-- 
Jagan Teki
Senior Linux Kernel Engineer | Amarula Solutions
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.