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[2001:1c00:c32:7800:5bfa:a036:83f0:f9ec]) by smtp.gmail.com with ESMTPSA id p3-20020aa7cc83000000b0050bc7c882bfsm4218865edt.65.2023.05.30.03.28.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 30 May 2023 03:28:24 -0700 (PDT) Message-ID: Date: Tue, 30 May 2023 12:28:23 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH 21/21] media: atomisp: csi2-bridge: Set PMC clk-rate for sensors to 19.2 MHz Content-Language: en-US, nl To: Andy Shevchenko Cc: Mauro Carvalho Chehab , Sakari Ailus , Andy Shevchenko , Kate Hsuan , Tsuchiya Yuto , Yury Luneff , Nable , andrey.i.trufanov@gmail.com, Fabio Aiuto , linux-media@vger.kernel.org, linux-staging@lists.linux.dev References: <20230529103741.11904-1-hdegoede@redhat.com> <20230529103741.11904-22-hdegoede@redhat.com> From: Hans de Goede In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Hi, On 5/29/23 23:48, Andy Shevchenko wrote: > On Mon, May 29, 2023 at 1:39 PM Hans de Goede wrote: >> >> The ACPI code takes care of enabling/disabling the PMC clk(s) for >> the sensors as necessary based on the runtime-pm state of the sensor. >> >> But the GMIN code this replaces also set the clk-rate of the PMC clk >> to 19.2 MHz. At least on BYT devices the PMC clks may come up running >> at 25 MHz instead of the expected 19.2 MHz. >> >> Ensure the sensor clk also runs at the expected 19.2 MHz for sensors >> using v4l2-async probing by explicitly setting it to 19.2 MHz when >> enumerating sensors in atomisp_csi2_bridge.c. > > ... > >> + ret = clk_prepare_enable(clk); >> + if (!ret) >> + clk_disable_unprepare(clk); > > I'm wondering if _enable / _disable required. As the comment says the BIOS may have the clock enabled at boot, the hw won't allow changing the rate while the clk is enabled and the clk-framework won't allow calling clk_disable_unprepare(clk) without first calling clk_prepare_enable(). All the sound/soc/intel/boards/*.c files which are used on BYT / CHT do the same thing before setting the codec clk speed. Regards, Hans