From: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
To: MyungJoo Ham <myungjoo.ham@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
"Rob Herring" <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Viresh Kumar <viresh.kumar@linaro.org>,
Nishanth Menon <nm@ti.com>, "Stephen Boyd" <sboyd@kernel.org>
Cc: devicetree@vger.kernel.org,
"Andrew-sh.Cheng" <andrew-sh.cheng@mediatek.com>,
srv_heupstream@mediatek.com, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org, fan.chen@mediatek.com,
linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [v5, PATCH 5/5] devfreq: mediatek: cci devfreq register opp notification for SVS support
Date: Tue, 26 Nov 2019 19:50:46 +0800 [thread overview]
Message-ID: <1574769046-28449-6-git-send-email-andrew-sh.cheng@mediatek.com> (raw)
In-Reply-To: <1574769046-28449-1-git-send-email-andrew-sh.cheng@mediatek.com>
From: "Andrew-sh.Cheng" <andrew-sh.cheng@mediatek.com>
SVS will change the voltage of opp item.
CCI devfreq need to react to change frequency.
Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
---
drivers/devfreq/mt8183-cci-devfreq.c | 61 ++++++++++++++++++++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/drivers/devfreq/mt8183-cci-devfreq.c b/drivers/devfreq/mt8183-cci-devfreq.c
index 818a167c442f..afc274d73c2f 100644
--- a/drivers/devfreq/mt8183-cci-devfreq.c
+++ b/drivers/devfreq/mt8183-cci-devfreq.c
@@ -19,7 +19,10 @@ struct cci_devfreq {
struct regulator *proc_reg;
unsigned long proc_reg_uV;
struct clk *cci_clk;
+ unsigned long freq;
struct notifier_block nb;
+ struct notifier_block opp_nb;
+ int cci_min_freq;
};
static int cci_devfreq_regulator_notifier(struct notifier_block *nb,
@@ -65,17 +68,60 @@ static int cci_devfreq_regulator_notifier(struct notifier_block *nb,
return 0;
}
+static int ccidevfreq_opp_notifier(struct notifier_block *nb,
+ unsigned long event, void *data)
+{
+ int ret;
+ struct dev_pm_opp *opp = data;
+ struct cci_devfreq *cci_df = container_of(nb, struct cci_devfreq,
+ opp_nb);
+ unsigned long freq, volt, cur_volt;
+
+ if (event == OPP_EVENT_ADJUST_VOLTAGE) {
+ freq = dev_pm_opp_get_freq(opp);
+ /* current opp item is changed */
+ if (freq == cci_df->freq) {
+ volt = dev_pm_opp_get_voltage(opp);
+ cur_volt = regulator_get_voltage(cci_df->proc_reg);
+
+ if (volt > cur_volt) {
+ /* need reduce freq */
+ mutex_lock(&cci_df->devfreq->lock);
+ ret = update_devfreq(cci_df->devfreq);
+ if (ret)
+ pr_err("Fail to reduce cci frequency by opp notification: %d\n",
+ ret);
+ mutex_unlock(&cci_df->devfreq->lock);
+ }
+ }
+
+ if (freq == cci_df->cci_min_freq) {
+ volt = dev_pm_opp_get_voltage(opp);
+ regulator_set_voltage(cci_df->proc_reg, volt, INT_MAX);
+ }
+ }
+
+ return 0;
+}
+
static int mtk_cci_governor_get_target(struct devfreq *devfreq,
unsigned long *freq)
{
struct cci_devfreq *cci_df;
struct dev_pm_opp *opp;
+ int ret;
cci_df = dev_get_drvdata(devfreq->dev.parent);
/* find available frequency */
opp = dev_pm_opp_find_freq_ceil_by_volt(devfreq->dev.parent,
cci_df->proc_reg_uV);
+ ret = PTR_ERR_OR_ZERO(opp);
+ if (ret) {
+ pr_err("%s[%d], cannot find opp with voltage=%d: %d\n",
+ __func__, __LINE__, cci_df->proc_reg_uV, ret);
+ return ret;
+ }
*freq = dev_pm_opp_get_freq(opp);
return 0;
@@ -87,9 +133,11 @@ static int mtk_cci_governor_event_handler(struct devfreq *devfreq,
int ret;
struct cci_devfreq *cci_df;
struct notifier_block *nb;
+ struct notifier_block *opp_nb;
cci_df = dev_get_drvdata(devfreq->dev.parent);
nb = &cci_df->nb;
+ opp_nb = &cci_df->opp_nb;
switch (event) {
case DEVFREQ_GOV_START:
@@ -100,6 +148,8 @@ static int mtk_cci_governor_event_handler(struct devfreq *devfreq,
if (ret)
pr_err("%s: failed to add governor: %d\n", __func__,
ret);
+ opp_nb->notifier_call = ccidevfreq_opp_notifier;
+ dev_pm_opp_register_notifier(devfreq->dev.parent, opp_nb);
break;
case DEVFREQ_GOV_STOP:
@@ -141,6 +191,8 @@ static int mtk_cci_devfreq_target(struct device *dev, unsigned long *freq,
return ret;
}
+ cci_df->freq = *freq;
+
return 0;
}
@@ -152,6 +204,8 @@ static int mtk_cci_devfreq_probe(struct platform_device *pdev)
{
struct device *cci_dev = &pdev->dev;
struct cci_devfreq *cci_df;
+ unsigned long freq, volt;
+ struct dev_pm_opp *opp;
int ret;
cci_df = devm_kzalloc(cci_dev, sizeof(*cci_df), GFP_KERNEL);
@@ -181,6 +235,13 @@ static int mtk_cci_devfreq_probe(struct platform_device *pdev)
return ret;
}
+ /* set voltage lower bound */
+ freq = 1;
+ opp = dev_pm_opp_find_freq_ceil(cci_dev, &freq);
+ cci_df->cci_min_freq = dev_pm_opp_get_freq(opp);
+ volt = dev_pm_opp_get_voltage(opp);
+ dev_pm_opp_put(opp);
+
platform_set_drvdata(pdev, cci_df);
cci_df->devfreq = devm_devfreq_add_device(cci_dev,
--
2.12.5
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next prev parent reply other threads:[~2019-11-26 12:01 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20191126115058epcas1p3caa6da2508caa5fbe71c202834184b15@epcas1p3.samsung.com>
2019-11-26 11:50 ` [v5, PATCH 0/5] Add cpufreq and cci devfreq for mt8183, and SVS support Andrew-sh.Cheng
2019-11-26 11:50 ` [v5, PATCH 1/5] cpufreq: mediatek: add clock enable for intermediate clock Andrew-sh.Cheng
2019-11-26 11:50 ` [v5, PATCH 2/5] dt-bindings: devfreq: add compatible for mt8183 cci devfreq Andrew-sh.Cheng
2019-12-17 2:38 ` Chanwoo Choi
2019-11-26 11:50 ` [v5, PATCH 3/5] devfreq: add mediatek " Andrew-sh.Cheng
2019-12-17 10:08 ` Chanwoo Choi
2019-11-26 11:50 ` [v5, PATCH 4/5] cpufreq: mediatek: add opp notification for SVS support Andrew-sh.Cheng
2019-11-27 8:36 ` Viresh Kumar
2019-12-09 6:56 ` andrew-sh.cheng
2019-12-10 6:43 ` Viresh Kumar
2020-03-10 8:11 ` andrew-sh.cheng
2020-03-11 6:06 ` Viresh Kumar
2020-03-12 9:12 ` andrew-sh.cheng
2020-03-13 7:22 ` andrew-sh.cheng
2020-03-13 9:10 ` Viresh Kumar
2020-04-06 9:12 ` andrew-sh.cheng
2020-04-06 9:29 ` Viresh Kumar
2020-04-07 6:54 ` andrew-sh.cheng
2020-04-07 8:29 ` Viresh Kumar
2020-04-07 9:09 ` andrew-sh.cheng
2019-11-26 11:50 ` Andrew-sh.Cheng [this message]
2019-12-17 7:31 ` [v5, PATCH 0/5] Add cpufreq and cci devfreq for mt8183, and " Chanwoo Choi
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