Re: [PATCH v5 1/2] dt-bindings: mediatek: mt8183: Add #reset-cells

From: Yong Liang <yong.liang@mediatek.com>
To: Philipp Zabel <p.zabel@pengutronix.de>
Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>,
	"alsa-devel@alsa-project.org" <alsa-devel@alsa-project.org>,
	"lgirdwood@gmail.com" <lgirdwood@gmail.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"perex@perex.cz" <perex@perex.cz>,
	"tzungbi@google.com" <tzungbi@google.com>,
	"broonie@kernel.org" <broonie@kernel.org>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"Jiaxin Yu (俞家鑫)" <Jiaxin.Yu@mediatek.com>,
	"Eason Yen (顏廷任)" <Eason.Yen@mediatek.com>,
	"Yingjoe Chen (陳英洲)" <Yingjoe.Chen@mediatek.com>,
	"wim@linux-watchdog.org" <wim@linux-watchdog.org>,
	"linux@roeck-us.net" <linux@roeck-us.net>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v5 1/2] dt-bindings: mediatek: mt8183: Add #reset-cells
Date: Fri, 29 Nov 2019 14:37:16 +0800	[thread overview]
Message-ID: <1575009436.6367.6.camel@mhfsdcap03> (raw)
In-Reply-To: <49c94039ba327a1295fdfd5d74dca0b9805269b0.camel@pengutronix.de>


On Mon, 2019-11-25 at 18:07 +0800, Philipp Zabel wrote:
> On Mon, 2019-11-25 at 11:03 +0800, Jiaxin Yu wrote:
> > From: "yong.liang" <yong.liang@mediatek.com>
> > 
> > Add #reset-cells property and update example
> > 
> > Signed-off-by: yong.liang <yong.liang@mediatek.com>
> > Signed-off-by: jiaxin.yu <jiaxin.yu@mediatek.com>
> > Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
> > ---
> >  .../devicetree/bindings/watchdog/mtk-wdt.txt  | 10 ++++++---
> >  .../reset-controller/mt2712-resets.h          | 22 +++++++++++++++++++
> >  .../reset-controller/mt8183-resets.h          | 15 +++++++++++++
> >  3 files changed, 44 insertions(+), 3 deletions(-)
> >  create mode 100644 include/dt-bindings/reset-controller/mt2712-resets.h
> > 
> > diff --git a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
> > index 3ee625d0812f..4dd36bd3f1ad 100644
> > --- a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
> > +++ b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
> > @@ -4,6 +4,7 @@ Required properties:
> >  
> >  - compatible should contain:
> >  	"mediatek,mt2701-wdt", "mediatek,mt6589-wdt": for MT2701
> > +	"mediatek,mt2712-wdt", "mediatek,mt6589-wdt": for MT2712
> >  	"mediatek,mt6589-wdt": for MT6589
> >  	"mediatek,mt6797-wdt", "mediatek,mt6589-wdt": for MT6797
> >  	"mediatek,mt7622-wdt", "mediatek,mt6589-wdt": for MT7622
> > @@ -16,11 +17,14 @@ Required properties:
> >  
> >  Optional properties:
> >  - timeout-sec: contains the watchdog timeout in seconds.
> > +- #reset-cells: Should be 1.
> >  
> >  Example:
> >  
> > -wdt: watchdog@10000000 {
> > -	compatible = "mediatek,mt6589-wdt";
> > -	reg = <0x10000000 0x18>;
> > +watchdog: watchdog@10007000 {
> > +	compatible = "mediatek,mt8183-wdt",
> > +		     "mediatek,mt6589-wdt";
> > +	reg = <0 0x10007000 0 0x100>;
> >  	timeout-sec = <10>;
> > +	#reset-cells = <1>;
> >  };
> > diff --git a/include/dt-bindings/reset-controller/mt2712-resets.h b/include/dt-bindings/reset-controller/mt2712-resets.h
> > new file mode 100644
> > index 000000000000..e81c8bb311b7
> > --- /dev/null
> > +++ b/include/dt-bindings/reset-controller/mt2712-resets.h
> > @@ -0,0 +1,22 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * Copyright (c) 2019 MediaTek Inc.
> > + * Author: Yong Liang <yong.liang@mediatek.com>
> > + */
> > +
> > +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT2712
> > +#define _DT_BINDINGS_RESET_CONTROLLER_MT2712
> > +
> > +#define MT2712_TOPRGU_INFRA_SW_RST				0
> > +#define MT2712_TOPRGU_MM_SW_RST					1
> > +#define MT2712_TOPRGU_MFG_SW_RST				2
> > +#define MT2712_TOPRGU_VENC_SW_RST				3
> > +#define MT2712_TOPRGU_VDEC_SW_RST				4
> > +#define MT2712_TOPRGU_IMG_SW_RST				5
> > +#define MT2712_TOPRGU_INFRA_AO_SW_RST				8
> > +#define MT2712_TOPRGU_USB_SW_RST				9
> > +#define MT2712_TOPRGU_APMIXED_SW_RST				10
> > +
> > +#define MT2712_TOPRGU_SW_RST_NUM				10
> 
> Setting rcdev->nr_resets to 10 will make the check in
> of_reset_simple_xlate() fail for MT2712_TOPRGU_APMIXED_SW_RST.
  -> OK. I will change MT2712_TOPRGU_SW_RST_NUM from 10 to 11
> 
> > +
> > +#endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT2712 */
> > diff --git a/include/dt-bindings/reset-controller/mt8183-resets.h b/include/dt-bindings/reset-controller/mt8183-resets.h
> > index 8804e34ebdd4..d582da6bedae 100644
> > --- a/include/dt-bindings/reset-controller/mt8183-resets.h
> > +++ b/include/dt-bindings/reset-controller/mt8183-resets.h
> > @@ -78,4 +78,19 @@
> >  #define MT8183_INFRACFG_AO_I2C7_SW_RST				126
> >  #define MT8183_INFRACFG_AO_I2C8_SW_RST				127
> >  
> > +#define MT8183_TOPRGU_MM_SW_RST					1
> > +#define MT8183_TOPRGU_MFG_SW_RST				2
> > +#define MT8183_TOPRGU_VENC_SW_RST				3
> > +#define MT8183_TOPRGU_VDEC_SW_RST				4
> > +#define MT8183_TOPRGU_IMG_SW_RST				5
> > +#define MT8183_TOPRGU_MD_SW_RST					7
> > +#define MT8183_TOPRGU_CONN_SW_RST				9
> > +#define MT8183_TOPRGU_CONN_MCU_SW_RST				12
> > +#define MT8183_TOPRGU_IPU0_SW_RST				14
> > +#define MT8183_TOPRGU_IPU1_SW_RST				15
> > +#define MT8183_TOPRGU_AUDIO_SW_RST				17
> > +#define MT8183_TOPRGU_CAMSYS_SW_RST				18
> > +
> > +#define MT8183_TOPRGU_SW_RST_NUM				18
> 
> Same here. If the driver uses the default of_xlate function, this has to
> be larger than the index of the last reset.
  -> I will change MT8183_TOPRGU_SW_RST_NUM from 18 to 19
> 
> regards
> Philipp
> 
> 
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