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Mon, 11 May 2020 17:16:45 -0800 Received: from MTKMBS31N1.mediatek.inc (172.27.4.69) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 11 May 2020 18:16:43 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by MTKMBS31N1.mediatek.inc (172.27.4.69) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 12 May 2020 09:16:34 +0800 Received: from [172.21.77.33] (172.21.77.33) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 12 May 2020 09:16:34 +0800 Message-ID: <1589246198.612.1.camel@mtkswgap22> Subject: Re: [PATCH v5 1/5] mmc: core: Extend mmc_of_parse() to parse CQE bindings From: Chun-Hung Wu To: Ulf Hansson Date: Tue, 12 May 2020 09:16:38 +0800 In-Reply-To: References: <1588031768-23677-1-git-send-email-chun-hung.wu@mediatek.com> <1588031768-23677-2-git-send-email-chun-hung.wu@mediatek.com> <9bc2454f-0b42-e256-7927-2564b56f369f@codeaurora.org> X-Mailer: Evolution 3.2.3-0ubuntu6 MIME-Version: 1.0 X-TM-SNTS-SMTP: 6AA204EBEAD201ACACA5EFC55AC0AB46C2AC4F420E581BAD29C20A66BBF8E8792000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200511_181653_458603_724F117C X-CRM114-Status: GOOD ( 26.24 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Kate Stewart , wsd_upstream , "linux-mmc@vger.kernel.org" , Linus Walleij , Al Cooper , Bjorn Andersson , linux-tegra , Thierry Reding , Pavel Machek , Florian Fainelli , Michal Simek , Jonathan Hunter , Andy Gross , BCM Kernel Feedback , Allison Randal , Android Kernel Team , Pan Bian , Veerabhadrarao Badiganti , DTML , Martin Blumenstingl , linux-arm-msm , =?UTF-8?Q?Micha=C5=82_Miros=C5=82aw?= , Rob Herring , "moderated list:ARM/Mediatek SoC support" , Matthias Brugger , Thomas Gleixner , Stanley Chu =?UTF-8?Q?=28=E6=9C=B1=E5=8E=9F=E9=99=9E=29?= , Chaotian Jing =?UTF-8?Q?=28=E4=BA=95=E6=9C=9D=E5=A4=A9=29?= , Linux ARM , Mathieu Malaterre , Greg Kroah-Hartman , Kuohong Wang =?UTF-8?Q?=28=E7=8E=8B=E5=9C=8B=E9=B4=BB=29?= , Adrian Hunter , Yong Mao =?UTF-8?Q?=28=E6=AF=9B=E5=8B=87=29?= , Linux Kernel Mailing List Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Fri, 2020-05-08 at 13:05 +0800, Ulf Hansson wrote: > On Thu, 7 May 2020 at 18:33, Veerabhadrarao Badiganti > wrote: > > > > > > On 5/6/2020 10:06 PM, Ulf Hansson wrote: > > > On Wed, 6 May 2020 at 15:01, Veerabhadrarao Badiganti > > > wrote: > > >> > > >> On 4/28/2020 5:26 AM, Chun-Hung Wu wrote: > > >>> Parse CQE bindings "supports-cqe" and "disable-cqe-dcmd" > > >>> in mmc_of_parse(). > > >>> > > >>> Signed-off-by: Chun-Hung Wu > > >>> --- > > >>> drivers/mmc/core/host.c | 5 +++++ > > >>> 1 file changed, 5 insertions(+) > > >>> > > >>> diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c > > >>> index c876872..47521c6 100644 > > >>> --- a/drivers/mmc/core/host.c > > >>> +++ b/drivers/mmc/core/host.c > > >>> @@ -302,6 +302,11 @@ int mmc_of_parse(struct mmc_host *host) > > >>> host->caps2 |= MMC_CAP2_NO_SD; > > >>> if (device_property_read_bool(dev, "no-mmc")) > > >>> host->caps2 |= MMC_CAP2_NO_MMC; > > >>> + if (device_property_read_bool(dev, "supports-cqe")) > > >>> + host->caps2 |= MMC_CAP2_CQE; > > >> This change is breaking emmc driver on qcom platforms where this dt > > >> property is defined. > > >> > > >> [ 1.543453] cqhci_deactivate+0xc/0x38 > > >> [ 1.545627] sdhci_msm_reset+0x40/0x58 > > >> [ 1.549447] sdhci_do_reset+0x48/0x7c > > >> [ 1.553180] __sdhci_read_caps+0x7c/0x214 > > >> [ 1.556913] sdhci_setup_host+0x58/0xce8 > > >> [ 1.560905] sdhci_msm_probe+0x588/0x8a4 > > >> [ 1.564900] platform_drv_probe+0x4c/0xb0 > > >> > > >> So, we cant have this flag defined before sdhci_setup_host(). > > >> > > >> I will have to clear this cap and re-enable it in our initialization. > > > Thanks for reporting! I have dropped all the four patches from > > > Chun-Hung, so we can figure out how to fix this. > > > > > > Please help to review the next version of the series. > > > > Thanks Ulf. > > > > Hi Chun-Hung, > > > > On qcom controller CQE also gets reset when SDHC is reset. So we have to > > explicitly disable CQE > > by invoking cqhci_deactivate() during sdhc reset > > > > SDHC gets reset in sdhci_setup_host() even before cqe is initialized. > > With MMC_CAP2_CQE_DCMD cap set even before sdhci_set_host(), we are > > getting null pointer access with cqhci_deactivate(). > > > > If CQE getting reset with SDHC reset is generic (applicable to other > > controllers) then you have revisit your logic. > > If its not the case then only qcom driver would get affected. > > Thanks for clarifying the problem, much appreciated. > > To me, it looks like the DT parsing of the CQE properties are better > suited to be managed by each sdhci variant, to continue to leave some > room for flexibility. > > Chun-Hung, can you please drop patch 1 and patch2 from the series and > adapt to this change in the mediatek variant? Ok, I will rollback patch1 and patch2 from series and keep DT parsing of the CQE properties by each sdhci/msdc variant. CQE properties will move to mediatek variant. > > [...] > > Kind regards > Uffe _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek