Re: [PATCH v2 4/8] dt-bindings: phy: convert HDMI PHY binding to YAML schema

[Chunfeng Yun <chunfeng.yun@mediatek.com>]

On Wed, 2020-10-14 at 12:44 +0800, CK Hu wrote:
> Hi, Chunfeng:
> 
> On Tue, 2020-10-13 at 16:52 +0800, Chunfeng Yun wrote:
> > Convert HDMI PHY binding to YAML schema mediatek,ufs-phy.yaml
> > 
> > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> > ---
> > v2: fix binding check warning of reg in example
> > ---
> >  .../display/mediatek/mediatek,hdmi.txt        | 17 +---
> >  .../bindings/phy/mediatek,hdmi-phy.yaml       | 90 +++++++++++++++++++
> >  2 files changed, 91 insertions(+), 16 deletions(-)
> >  create mode 100644 Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
> > index 7b124242b0c5..edac18951a75 100644
> > --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
> > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
> > @@ -50,22 +50,7 @@ Required properties:
> >  
> >  HDMI PHY
> >  ========
> > -
> > -The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel
> > -output and drives the HDMI pads.
> > -
> > -Required properties:
> > -- compatible: "mediatek,<chip>-hdmi-phy"
> > -- reg: Physical base address and length of the module's registers
> > -- clocks: PLL reference clock
> > -- clock-names: must contain "pll_ref"
> > -- clock-output-names: must be "hdmitx_dig_cts" on mt8173
> > -- #phy-cells: must be <0>
> > -- #clock-cells: must be <0>
> > -
> > -Optional properties:
> > -- mediatek,ibias: TX DRV bias current for <1.65Gbps, defaults to 0xa
> > -- mediatek,ibias_up: TX DRV bias current for >1.65Gbps, defaults to 0x1c
> > +See phy/mediatek,hdmi-phy.yaml
> >  
> >  Example:
> >  
> > diff --git a/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml
> > new file mode 100644
> > index 000000000000..77df50204606
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml
> > @@ -0,0 +1,90 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +# Copyright (c) 2020 MediaTek
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/phy/mediatek,hdmi-phy.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek High Definition Multimedia Interface (HDMI) PHY binding
> > +
> > +maintainers:
> > +  - CK Hu <ck.hu@mediatek.com>
> 
> I think you should remove "CK Hu <ck.hu@mediatek.com>" and add latest
> mediatek drm maintainer:
Ok, will do it, thanks

> 
> DRM DRIVERS FOR MEDIATEK
> M:	Chun-Kuang Hu <chunkuang.hu@kernel.org>
> M:	Philipp Zabel <p.zabel@pengutronix.de>
> L:	dri-devel@lists.freedesktop.org
> S:	Supported
> F:	Documentation/devicetree/bindings/display/mediatek/
> F:	drivers/gpu/drm/mediatek/
> 
> Regards,
> CK

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek