[PATCH v3,0/8] Add Mediatek thermal dirver and dtsi

[PATCH v3,0/8] Add Mediatek thermal dirver and dtsi

[Michael Kao]

This patchset supports for MT8183 chip to mtk_thermal.c.
Add thermal zone of all the thermal sensor in SoC for
another get temperatrue. They don't need to thermal throttle.
And we bind coolers for thermal zone nodes of cpu_thermal.

Rebase to kernel-5.5-rc1.

Update content:

[1/8]
Update sustainable power of cpu, tzts1~5 and tztsABB.

[7/8]
Bypass the failure that non cpu_thermal sensor is not find in thermal-zones
in dts, which is normal for mt8173, so prompt a warning here instead of
failing.

Return -EAGAIN instead of -EACCESS on the first read of sensor that
often are bogus values. This can avoid following warning on boot:

  thermal thermal_zone6: failed to read out thermal zone (-13)


This patch series base on these patches [1][2][3][4].

[1]support for reading chip ID and efuse (https://patchwork.kernel.org/patch/10902131/)
[2]arm64: dts: mt8183: Add reset-cells in infracfg (https://patchwork.kernel.org/patch/10908653/)
[3]clk: reset: Modify reset-controller driver (https://patchwork.kernel.org/patch/10908657/)
[4]PM / AVS: SVS: Introduce SVS engine (https://patchwork.kernel.org/patch/10923289/)

Matthias Kaehlcke (2):
  arm64: dts: mt8183: Configure CPU cooling
  arm64: dts: mt8183: Increase polling frequency for CPU thermal zone

Michael Kao (6):
  arm64: dts: mt8183: add thermal zone node
  arm64: dts: mt8183: add/update dynamic power coefficients
  arm64: dts: mt8183: Add #cooling-cells to CPU nodes
  thermal: mediatek: mt8183: fix bank number settings
  thermal: mediatek: add another get_temp ops for thermal sensors
  thermal: mediatek: use spinlock to protect PTPCORESEL

 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 157 +++++++++++++++++++++++
 drivers/thermal/mtk_thermal.c            |  88 +++++++++++--
 2 files changed, 231 insertions(+), 14 deletions(-)

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[PATCH v3,1/8] arm64: dts: mt8183: add thermal zone node

[Michael Kao]

From: "michael.kao" <michael.kao@mediatek.com>

Add thermal zone node to Mediatek MT8183 dts file.

Signed-off-by: Michael Kao <michael.kao@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 85 ++++++++++++++++++++++++
 1 file changed, 85 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 10b32471bc7b..a2793cf3d994 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -570,6 +570,88 @@
 			status = "disabled";
 		};
 
+		thermal: thermal@1100b000 {
+			#thermal-sensor-cells = <1>;
+			compatible = "mediatek,mt8183-thermal";
+			reg = <0 0x1100b000 0 0x1000>;
+			interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>;
+			clocks = <&infracfg CLK_INFRA_THERM>,
+				 <&infracfg CLK_INFRA_AUXADC>;
+			clock-names = "therm", "auxadc";
+			resets = <&infracfg  MT8183_INFRACFG_AO_THERM_SW_RST>;
+			mediatek,auxadc = <&auxadc>;
+			mediatek,apmixedsys = <&apmixedsys>;
+			mediatek,hw-reset-temp = <117000>;
+			nvmem-cells = <&thermal_calibration>;
+			nvmem-cell-names = "calibration-data";
+		};
+
+		thermal-zones {
+			cpu_thermal: cpu_thermal {
+				polling-delay-passive = <1000>;
+				polling-delay = <1000>;
+				thermal-sensors = <&thermal 0>;
+				sustainable-power = <5000>;
+			};
+
+			/* The tzts1 ~ tzts6 don't need to polling */
+			/* The tzts1 ~ tzts6 don't need to thermal throttle */
+
+			tzts1: tzts1 {
+				polling-delay-passive = <0>;
+				polling-delay = <0>;
+				thermal-sensors = <&thermal 1>;
+				sustainable-power = <5000>;
+				trips {};
+				cooling-maps {};
+			};
+
+			tzts2: tzts2 {
+				polling-delay-passive = <0>;
+				polling-delay = <0>;
+				thermal-sensors = <&thermal 2>;
+				sustainable-power = <5000>;
+				trips {};
+				cooling-maps {};
+			};
+
+			tzts3: tzts3 {
+				polling-delay-passive = <0>;
+				polling-delay = <0>;
+				thermal-sensors = <&thermal 3>;
+				sustainable-power = <5000>;
+				trips {};
+				cooling-maps {};
+			};
+
+			tzts4: tzts4 {
+				polling-delay-passive = <0>;
+				polling-delay = <0>;
+				thermal-sensors = <&thermal 4>;
+				sustainable-power = <5000>;
+				trips {};
+				cooling-maps {};
+			};
+
+			tzts5: tzts5 {
+				polling-delay-passive = <0>;
+				polling-delay = <0>;
+				thermal-sensors = <&thermal 5>;
+				sustainable-power = <5000>;
+				trips {};
+				cooling-maps {};
+			};
+
+			tztsABB: tztsABB {
+				polling-delay-passive = <0>;
+				polling-delay = <0>;
+				thermal-sensors = <&thermal 6>;
+				sustainable-power = <5000>;
+				trips {};
+				cooling-maps {};
+			};
+		};
+
 		audiosys: syscon@11220000 {
 			compatible = "mediatek,mt8183-audiosys", "syscon";
 			reg = <0 0x11220000 0 0x1000>;
@@ -580,6 +662,9 @@
 			compatible = "mediatek,mt8183-efuse",
 				     "mediatek,efuse";
 			reg = <0 0x11f10000 0 0x1000>;
+			thermal_calibration: calib@180 {
+				reg = <0x180 0xc>;
+			};
 		};
 
 		mfgcfg: syscon@13000000 {
-- 
2.18.0
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Re: [PATCH v3,1/8] arm64: dts: mt8183: add thermal zone node

[Daniel Lezcano]

On 03/01/2020 07:44, Michael Kao wrote:
> From: "michael.kao" <michael.kao@mediatek.com>
> 
> Add thermal zone node to Mediatek MT8183 dts file.
> 
> Signed-off-by: Michael Kao <michael.kao@mediatek.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 85 ++++++++++++++++++++++++
>  1 file changed, 85 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 10b32471bc7b..a2793cf3d994 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -570,6 +570,88 @@
>  			status = "disabled";
>  		};
>  
> +		thermal: thermal@1100b000 {
> +			#thermal-sensor-cells = <1>;
> +			compatible = "mediatek,mt8183-thermal";
> +			reg = <0 0x1100b000 0 0x1000>;
> +			interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>;

What is this interrupt for?

> +			clocks = <&infracfg CLK_INFRA_THERM>,
> +				 <&infracfg CLK_INFRA_AUXADC>;
> +			clock-names = "therm", "auxadc";
> +			resets = <&infracfg  MT8183_INFRACFG_AO_THERM_SW_RST>;
> +			mediatek,auxadc = <&auxadc>;
> +			mediatek,apmixedsys = <&apmixedsys>;
> +			mediatek,hw-reset-temp = <117000>;
> +			nvmem-cells = <&thermal_calibration>;
> +			nvmem-cell-names = "calibration-data";
> +		};
> +
> +		thermal-zones {
> +			cpu_thermal: cpu_thermal {
> +				polling-delay-passive = <1000>;
> +				polling-delay = <1000>;

[ ... ]






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Re: [PATCH v3,1/8] arm64: dts: mt8183: add thermal zone node

[Michael Kao]

On Thu, 2020-01-09 at 12:31 +0100, Daniel Lezcano wrote:
> On 03/01/2020 07:44, Michael Kao wrote:
> > From: "michael.kao" <michael.kao@mediatek.com>
> > 
> > Add thermal zone node to Mediatek MT8183 dts file.
> > 
> > Signed-off-by: Michael Kao <michael.kao@mediatek.com>
> > ---
> >  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 85 ++++++++++++++++++++++++
> >  1 file changed, 85 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> > index 10b32471bc7b..a2793cf3d994 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> > @@ -570,6 +570,88 @@
> >  			status = "disabled";
> >  		};
> >  
> > +		thermal: thermal@1100b000 {
> > +			#thermal-sensor-cells = <1>;
> > +			compatible = "mediatek,mt8183-thermal";
> > +			reg = <0 0x1100b000 0 0x1000>;
> > +			interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>;
> 
> What is this interrupt for?

The interrupts pin is designed in our SoC. But it is not used in our
upstream thermal code now. There is also add the settings but not use
for mt8173.dtsi. To align the thermal dtsi format, I follow the past
experience to add the interrupt settings of this project first.

> 
> > +			clocks = <&infracfg CLK_INFRA_THERM>,
> > +				 <&infracfg CLK_INFRA_AUXADC>;
> > +			clock-names = "therm", "auxadc";
> > +			resets = <&infracfg  MT8183_INFRACFG_AO_THERM_SW_RST>;
> > +			mediatek,auxadc = <&auxadc>;
> > +			mediatek,apmixedsys = <&apmixedsys>;
> > +			mediatek,hw-reset-temp = <117000>;
> > +			nvmem-cells = <&thermal_calibration>;
> > +			nvmem-cell-names = "calibration-data";
> > +		};
> > +
> > +		thermal-zones {
> > +			cpu_thermal: cpu_thermal {
> > +				polling-delay-passive = <1000>;
> > +				polling-delay = <1000>;
> 
> [ ... ]
> 
> 
> 
> 
> 
> 

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Re: [PATCH v3,1/8] arm64: dts: mt8183: add thermal zone node

[Daniel Lezcano]

On 11/02/2020 04:17, Michael Kao wrote:
> On Thu, 2020-01-09 at 12:31 +0100, Daniel Lezcano wrote:
>> On 03/01/2020 07:44, Michael Kao wrote:
>>> From: "michael.kao" <michael.kao@mediatek.com>
>>>
>>> Add thermal zone node to Mediatek MT8183 dts file.
>>>
>>> Signed-off-by: Michael Kao <michael.kao@mediatek.com>
>>> ---
>>>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 85 ++++++++++++++++++++++++
>>>  1 file changed, 85 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
>>> index 10b32471bc7b..a2793cf3d994 100644
>>> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
>>> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
>>> @@ -570,6 +570,88 @@
>>>  			status = "disabled";
>>>  		};
>>>  
>>> +		thermal: thermal@1100b000 {
>>> +			#thermal-sensor-cells = <1>;
>>> +			compatible = "mediatek,mt8183-thermal";
>>> +			reg = <0 0x1100b000 0 0x1000>;
>>> +			interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>;
>>
>> What is this interrupt for?
> 
> The interrupts pin is designed in our SoC. But it is not used in our
> upstream thermal code now. There is also add the settings but not use
> for mt8173.dtsi. To align the thermal dtsi format, I follow the past
> experience to add the interrupt settings of this project first.

Assuming the interrupt can be set by the driver to fire when a specified
temperature is set, I suggest to change your driver to handle it so you
can get rid of the polling waking up the SoC every second.


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Re: [PATCH v3,1/8] arm64: dts: mt8183: add thermal zone node

[Matthias Brugger]

On 20/02/2020 12:52, Daniel Lezcano wrote:
> On 11/02/2020 04:17, Michael Kao wrote:
>> On Thu, 2020-01-09 at 12:31 +0100, Daniel Lezcano wrote:
>>> On 03/01/2020 07:44, Michael Kao wrote:
>>>> From: "michael.kao" <michael.kao@mediatek.com>
>>>>
>>>> Add thermal zone node to Mediatek MT8183 dts file.
>>>>
>>>> Signed-off-by: Michael Kao <michael.kao@mediatek.com>
>>>> ---
>>>>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 85 ++++++++++++++++++++++++
>>>>  1 file changed, 85 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
>>>> index 10b32471bc7b..a2793cf3d994 100644
>>>> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
>>>> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
>>>> @@ -570,6 +570,88 @@
>>>>  			status = "disabled";
>>>>  		};
>>>>  
>>>> +		thermal: thermal@1100b000 {
>>>> +			#thermal-sensor-cells = <1>;
>>>> +			compatible = "mediatek,mt8183-thermal";
>>>> +			reg = <0 0x1100b000 0 0x1000>;
>>>> +			interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>;
>>>
>>> What is this interrupt for?
>>
>> The interrupts pin is designed in our SoC. But it is not used in our
>> upstream thermal code now. There is also add the settings but not use
>> for mt8173.dtsi. To align the thermal dtsi format, I follow the past
>> experience to add the interrupt settings of this project first.
> 
> Assuming the interrupt can be set by the driver to fire when a specified
> temperature is set, I suggest to change your driver to handle it so you
> can get rid of the polling waking up the SoC every second.
> 

For the record the interrupt is a required property by the binding description.

Regards,
Matthias

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Re: [PATCH v3,1/8] arm64: dts: mt8183: add thermal zone node

[Michael Kao]

On Thu, 2020-02-20 at 21:57 +0100, Matthias Brugger wrote:
> 
> On 20/02/2020 12:52, Daniel Lezcano wrote:
> > On 11/02/2020 04:17, Michael Kao wrote:
> >> On Thu, 2020-01-09 at 12:31 +0100, Daniel Lezcano wrote:
> >>> On 03/01/2020 07:44, Michael Kao wrote:
> >>>> From: "michael.kao" <michael.kao@mediatek.com>
> >>>>
> >>>> Add thermal zone node to Mediatek MT8183 dts file.
> >>>>
> >>>> Signed-off-by: Michael Kao <michael.kao@mediatek.com>
> >>>> ---
> >>>>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 85 ++++++++++++++++++++++++
> >>>>  1 file changed, 85 insertions(+)
> >>>>
> >>>> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> >>>> index 10b32471bc7b..a2793cf3d994 100644
> >>>> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> >>>> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> >>>> @@ -570,6 +570,88 @@
> >>>>  			status = "disabled";
> >>>>  		};
> >>>>  
> >>>> +		thermal: thermal@1100b000 {
> >>>> +			#thermal-sensor-cells = <1>;
> >>>> +			compatible = "mediatek,mt8183-thermal";
> >>>> +			reg = <0 0x1100b000 0 0x1000>;
> >>>> +			interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>;
> >>>
> >>> What is this interrupt for?
> >>
> >> The interrupts pin is designed in our SoC. But it is not used in our
> >> upstream thermal code now. There is also add the settings but not use
> >> for mt8173.dtsi. To align the thermal dtsi format, I follow the past
> >> experience to add the interrupt settings of this project first.
> > 
> > Assuming the interrupt can be set by the driver to fire when a specified
> > temperature is set, I suggest to change your driver to handle it so you
> > can get rid of the polling waking up the SoC every second.
> > 
> 
> For the record the interrupt is a required property by the binding description.
> 
> Regards,
> Matthias

After checking with interrupt owner, it is not required property for
thermal.
I will remove the property of hw-reset-temp and interrupt.
And also I will add new line to fix format.
These three change will resend v4 to fix them.
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Re: [PATCH v3,1/8] arm64: dts: mt8183: add thermal zone node

[Matthias Brugger]

On 03/01/2020 07:44, Michael Kao wrote:
> From: "michael.kao" <michael.kao@mediatek.com>
> 
> Add thermal zone node to Mediatek MT8183 dts file.
> 
> Signed-off-by: Michael Kao <michael.kao@mediatek.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 85 ++++++++++++++++++++++++
>  1 file changed, 85 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 10b32471bc7b..a2793cf3d994 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -570,6 +570,88 @@
>  			status = "disabled";
>  		};
>  
> +		thermal: thermal@1100b000 {
> +			#thermal-sensor-cells = <1>;
> +			compatible = "mediatek,mt8183-thermal";
> +			reg = <0 0x1100b000 0 0x1000>;
> +			interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>;
> +			clocks = <&infracfg CLK_INFRA_THERM>,
> +				 <&infracfg CLK_INFRA_AUXADC>;
> +			clock-names = "therm", "auxadc";
> +			resets = <&infracfg  MT8183_INFRACFG_AO_THERM_SW_RST>;
> +			mediatek,auxadc = <&auxadc>;
> +			mediatek,apmixedsys = <&apmixedsys>;
> +			mediatek,hw-reset-temp = <117000>;

Non uptream property, please delte

> +			nvmem-cells = <&thermal_calibration>;
> +			nvmem-cell-names = "calibration-data";
> +		};
> +
> +		thermal-zones {
> +			cpu_thermal: cpu_thermal {
> +				polling-delay-passive = <1000>;
> +				polling-delay = <1000>;
> +				thermal-sensors = <&thermal 0>;
> +				sustainable-power = <5000>;
> +			};
> +
> +			/* The tzts1 ~ tzts6 don't need to polling */
> +			/* The tzts1 ~ tzts6 don't need to thermal throttle */
> +
> +			tzts1: tzts1 {
> +				polling-delay-passive = <0>;
> +				polling-delay = <0>;
> +				thermal-sensors = <&thermal 1>;
> +				sustainable-power = <5000>;
> +				trips {};
> +				cooling-maps {};
> +			};
> +
> +			tzts2: tzts2 {
> +				polling-delay-passive = <0>;
> +				polling-delay = <0>;
> +				thermal-sensors = <&thermal 2>;
> +				sustainable-power = <5000>;
> +				trips {};
> +				cooling-maps {};
> +			};
> +
> +			tzts3: tzts3 {
> +				polling-delay-passive = <0>;
> +				polling-delay = <0>;
> +				thermal-sensors = <&thermal 3>;
> +				sustainable-power = <5000>;
> +				trips {};
> +				cooling-maps {};
> +			};
> +
> +			tzts4: tzts4 {
> +				polling-delay-passive = <0>;
> +				polling-delay = <0>;
> +				thermal-sensors = <&thermal 4>;
> +				sustainable-power = <5000>;
> +				trips {};
> +				cooling-maps {};
> +			};
> +
> +			tzts5: tzts5 {
> +				polling-delay-passive = <0>;
> +				polling-delay = <0>;
> +				thermal-sensors = <&thermal 5>;
> +				sustainable-power = <5000>;
> +				trips {};
> +				cooling-maps {};
> +			};
> +
> +			tztsABB: tztsABB {
> +				polling-delay-passive = <0>;
> +				polling-delay = <0>;
> +				thermal-sensors = <&thermal 6>;
> +				sustainable-power = <5000>;
> +				trips {};
> +				cooling-maps {};
> +			};
> +		};
> +
>  		audiosys: syscon@11220000 {
>  			compatible = "mediatek,mt8183-audiosys", "syscon";
>  			reg = <0 0x11220000 0 0x1000>;
> @@ -580,6 +662,9 @@
>  			compatible = "mediatek,mt8183-efuse",
>  				     "mediatek,efuse";
>  			reg = <0 0x11f10000 0 0x1000>;

New line here please.

> +			thermal_calibration: calib@180 {
> +				reg = <0x180 0xc>;
> +			};
>  		};
>  
>  		mfgcfg: syscon@13000000 {
> 

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[PATCH v3, 2/8] arm64: dts: mt8183: add/update dynamic power coefficients

[Michael Kao]

From: "michael.kao" <michael.kao@mediatek.com>

Add dynamic power coefficients for all cores and update those of
CPU0 and CPU4.

Signed-off-by: Michael Kao <michael.kao@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index a2793cf3d994..cfb74af260e0 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -73,6 +73,7 @@
 			reg = <0x000>;
 			enable-method = "psci";
 			capacity-dmips-mhz = <741>;
+			dynamic-power-coefficient = <84>;
 		};
 
 		cpu1: cpu@1 {
@@ -81,6 +82,7 @@
 			reg = <0x001>;
 			enable-method = "psci";
 			capacity-dmips-mhz = <741>;
+			dynamic-power-coefficient = <84>;
 		};
 
 		cpu2: cpu@2 {
@@ -89,6 +91,7 @@
 			reg = <0x002>;
 			enable-method = "psci";
 			capacity-dmips-mhz = <741>;
+			dynamic-power-coefficient = <84>;
 		};
 
 		cpu3: cpu@3 {
@@ -97,6 +100,7 @@
 			reg = <0x003>;
 			enable-method = "psci";
 			capacity-dmips-mhz = <741>;
+			dynamic-power-coefficient = <84>;
 		};
 
 		cpu4: cpu@100 {
@@ -105,6 +109,7 @@
 			reg = <0x100>;
 			enable-method = "psci";
 			capacity-dmips-mhz = <1024>;
+			dynamic-power-coefficient = <211>;
 		};
 
 		cpu5: cpu@101 {
@@ -113,6 +118,7 @@
 			reg = <0x101>;
 			enable-method = "psci";
 			capacity-dmips-mhz = <1024>;
+			dynamic-power-coefficient = <211>;
 		};
 
 		cpu6: cpu@102 {
@@ -121,6 +127,7 @@
 			reg = <0x102>;
 			enable-method = "psci";
 			capacity-dmips-mhz = <1024>;
+			dynamic-power-coefficient = <211>;
 		};
 
 		cpu7: cpu@103 {
@@ -129,6 +136,7 @@
 			reg = <0x103>;
 			enable-method = "psci";
 			capacity-dmips-mhz = <1024>;
+			dynamic-power-coefficient = <211>;
 		};
 	};
 
-- 
2.18.0
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Re: [PATCH v3,2/8] arm64: dts: mt8183: add/update dynamic power coefficients

[Matthias Brugger]

On 03/01/2020 07:44, Michael Kao wrote:
> From: "michael.kao" <michael.kao@mediatek.com>
> 
> Add dynamic power coefficients for all cores and update those of
> CPU0 and CPU4.

No update in this patch. I suppose it need rewording.

Regards,
Matthias

> 
> Signed-off-by: Michael Kao <michael.kao@mediatek.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index a2793cf3d994..cfb74af260e0 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -73,6 +73,7 @@
>  			reg = <0x000>;
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <741>;
> +			dynamic-power-coefficient = <84>;
>  		};
>  
>  		cpu1: cpu@1 {
> @@ -81,6 +82,7 @@
>  			reg = <0x001>;
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <741>;
> +			dynamic-power-coefficient = <84>;
>  		};
>  
>  		cpu2: cpu@2 {
> @@ -89,6 +91,7 @@
>  			reg = <0x002>;
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <741>;
> +			dynamic-power-coefficient = <84>;
>  		};
>  
>  		cpu3: cpu@3 {
> @@ -97,6 +100,7 @@
>  			reg = <0x003>;
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <741>;
> +			dynamic-power-coefficient = <84>;
>  		};
>  
>  		cpu4: cpu@100 {
> @@ -105,6 +109,7 @@
>  			reg = <0x100>;
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <1024>;
> +			dynamic-power-coefficient = <211>;
>  		};
>  
>  		cpu5: cpu@101 {
> @@ -113,6 +118,7 @@
>  			reg = <0x101>;
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <1024>;
> +			dynamic-power-coefficient = <211>;
>  		};
>  
>  		cpu6: cpu@102 {
> @@ -121,6 +127,7 @@
>  			reg = <0x102>;
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <1024>;
> +			dynamic-power-coefficient = <211>;
>  		};
>  
>  		cpu7: cpu@103 {
> @@ -129,6 +136,7 @@
>  			reg = <0x103>;
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <1024>;
> +			dynamic-power-coefficient = <211>;
>  		};
>  	};
>  
> 

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Re: [PATCH v3,2/8] arm64: dts: mt8183: add/update dynamic power coefficients

[Michael Kao]

On Fri, 2020-01-10 at 15:40 +0100, Matthias Brugger wrote:
> I suppose it need rewording.

Hi Matthias,

This patch was resent following with the patch series,Add Mediatek
thermal driver and dtsi.
I have write all the changes in the cover letter.
There is no change in this patch.

Do you mean that I need to add some word to commit message or
change the dynamic power coefficients?

Best Regards,
Michael Kao
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Re: [PATCH v3,2/8] arm64: dts: mt8183: add/update dynamic power coefficients

[Matthias Brugger]

On 11/02/2020 03:05, Michael Kao wrote:
> On Fri, 2020-01-10 at 15:40 +0100, Matthias Brugger wrote:
>> I suppose it need rewording.
> 
> Hi Matthias,
> 
> This patch was resent following with the patch series,Add Mediatek
> thermal driver and dtsi.
> I have write all the changes in the cover letter.
> There is no change in this patch.
> 
> Do you mean that I need to add some word to commit message or
> change the dynamic power coefficients?
> 

Your commit message says:
"Add dynamic power coefficients for all cores and update those of CPU0 and CPU4."

But the power coefficients for CPU0-4 are not updated, but added.

I fixed the commit message and pushed to v5.6-next/dts64

Please double check that everything is correct.

Regards,
Matthias

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[PATCH v3,3/8] arm64: dts: mt8183: Add #cooling-cells to CPU nodes

[Michael Kao]

From: "michael.kao" <michael.kao@mediatek.com>

The #cooling-cells property needs to be specified to allow a CPU
to be used as cooling device.

Signed-off-by: Michael Kao <michael.kao@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index cfb74af260e0..63378ae14a16 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include "mt8183-pinfunc.h"
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	compatible = "mediatek,mt8183";
@@ -74,6 +75,7 @@
 			enable-method = "psci";
 			capacity-dmips-mhz = <741>;
 			dynamic-power-coefficient = <84>;
+			#cooling-cells = <2>;
 		};
 
 		cpu1: cpu@1 {
@@ -83,6 +85,7 @@
 			enable-method = "psci";
 			capacity-dmips-mhz = <741>;
 			dynamic-power-coefficient = <84>;
+			#cooling-cells = <2>;
 		};
 
 		cpu2: cpu@2 {
@@ -92,6 +95,7 @@
 			enable-method = "psci";
 			capacity-dmips-mhz = <741>;
 			dynamic-power-coefficient = <84>;
+			#cooling-cells = <2>;
 		};
 
 		cpu3: cpu@3 {
@@ -101,6 +105,7 @@
 			enable-method = "psci";
 			capacity-dmips-mhz = <741>;
 			dynamic-power-coefficient = <84>;
+			#cooling-cells = <2>;
 		};
 
 		cpu4: cpu@100 {
@@ -110,6 +115,7 @@
 			enable-method = "psci";
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <211>;
+			#cooling-cells = <2>;
 		};
 
 		cpu5: cpu@101 {
@@ -119,6 +125,7 @@
 			enable-method = "psci";
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <211>;
+			#cooling-cells = <2>;
 		};
 
 		cpu6: cpu@102 {
@@ -128,6 +135,7 @@
 			enable-method = "psci";
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <211>;
+			#cooling-cells = <2>;
 		};
 
 		cpu7: cpu@103 {
@@ -137,6 +145,7 @@
 			enable-method = "psci";
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <211>;
+			#cooling-cells = <2>;
 		};
 	};
 
-- 
2.18.0
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Re: [PATCH v3,3/8] arm64: dts: mt8183: Add #cooling-cells to CPU nodes

[Matthias Brugger]

On 03/01/2020 07:44, Michael Kao wrote:
> From: "michael.kao" <michael.kao@mediatek.com>
> 
> The #cooling-cells property needs to be specified to allow a CPU
> to be used as cooling device.
> 
> Signed-off-by: Michael Kao <michael.kao@mediatek.com>

Applied to v5.6-next/dts64

Thanks

> ---
>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index cfb74af260e0..63378ae14a16 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -9,6 +9,7 @@
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include "mt8183-pinfunc.h"
> +#include <dt-bindings/thermal/thermal.h>
>  
>  / {
>  	compatible = "mediatek,mt8183";
> @@ -74,6 +75,7 @@
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <741>;
>  			dynamic-power-coefficient = <84>;
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu1: cpu@1 {
> @@ -83,6 +85,7 @@
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <741>;
>  			dynamic-power-coefficient = <84>;
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu2: cpu@2 {
> @@ -92,6 +95,7 @@
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <741>;
>  			dynamic-power-coefficient = <84>;
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu3: cpu@3 {
> @@ -101,6 +105,7 @@
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <741>;
>  			dynamic-power-coefficient = <84>;
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu4: cpu@100 {
> @@ -110,6 +115,7 @@
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <1024>;
>  			dynamic-power-coefficient = <211>;
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu5: cpu@101 {
> @@ -119,6 +125,7 @@
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <1024>;
>  			dynamic-power-coefficient = <211>;
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu6: cpu@102 {
> @@ -128,6 +135,7 @@
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <1024>;
>  			dynamic-power-coefficient = <211>;
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu7: cpu@103 {
> @@ -137,6 +145,7 @@
>  			enable-method = "psci";
>  			capacity-dmips-mhz = <1024>;
>  			dynamic-power-coefficient = <211>;
> +			#cooling-cells = <2>;
>  		};
>  	};
>  
> 

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[PATCH v3,4/8] arm64: dts: mt8183: Configure CPU cooling

[Michael Kao]

From: Matthias Kaehlcke <mka@chromium.org>

Add two passive trip points at 68°C and 85°C for the CPU temperature.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Michael Kao <michael.kao@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 55 ++++++++++++++++++++++++
 1 file changed, 55 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 63378ae14a16..78575c3183a4 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -609,6 +609,61 @@
 				polling-delay = <1000>;
 				thermal-sensors = <&thermal 0>;
 				sustainable-power = <5000>;
+
+				trips {
+					threshold: trip-point@0 {
+						temperature = <68000>;
+						hysteresis = <2000>;
+						type = "passive";
+					};
+
+					target: trip-point@1 {
+						temperature = <85000>;
+						hysteresis = <2000>;
+						type = "passive";
+					};
+
+					cpu_crit: cpu-crit {
+						temperature = <115000>;
+						hysteresis = <2000>;
+						type = "critical";
+					};
+				};
+
+				cooling-maps {
+					map0 {
+						trip = <&target>;
+						cooling-device = <&cpu0
+							THERMAL_NO_LIMIT
+							THERMAL_NO_LIMIT>,
+								 <&cpu1
+							THERMAL_NO_LIMIT
+							THERMAL_NO_LIMIT>,
+								 <&cpu2
+							THERMAL_NO_LIMIT
+							THERMAL_NO_LIMIT>,
+								 <&cpu3
+							THERMAL_NO_LIMIT
+							THERMAL_NO_LIMIT>;
+						contribution = <3072>;
+					};
+					map1 {
+						trip = <&target>;
+						cooling-device = <&cpu4
+							THERMAL_NO_LIMIT
+							THERMAL_NO_LIMIT>,
+								 <&cpu5
+							THERMAL_NO_LIMIT
+							THERMAL_NO_LIMIT>,
+								 <&cpu6
+							THERMAL_NO_LIMIT
+							THERMAL_NO_LIMIT>,
+								 <&cpu7
+							THERMAL_NO_LIMIT
+							THERMAL_NO_LIMIT>;
+						contribution = <1024>;
+					};
+				};
 			};
 
 			/* The tzts1 ~ tzts6 don't need to polling */
-- 
2.18.0
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Re: [PATCH v3,4/8] arm64: dts: mt8183: Configure CPU cooling

[Michael Kao]

On Fri, 2020-01-03 at 14:44 +0800, Michael Kao wrote:
> From: Matthias Kaehlcke <mka@chromium.org>
> 
> Add two passive trip points at 68°C and 85°C for the CPU temperature.
> 
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> Signed-off-by: Michael Kao <michael.kao@mediatek.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 55 ++++++++++++++++++++++++
>  1 file changed, 55 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 63378ae14a16..78575c3183a4 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -609,6 +609,61 @@
>  				polling-delay = <1000>;
>  				thermal-sensors = <&thermal 0>;
>  				sustainable-power = <5000>;
> +
> +				trips {
> +					threshold: trip-point@0 {
> +						temperature = <68000>;
> +						hysteresis = <2000>;
> +						type = "passive";
> +					};
> +
> +					target: trip-point@1 {
> +						temperature = <85000>;
> +						hysteresis = <2000>;
> +						type = "passive";
> +					};
> +
> +					cpu_crit: cpu-crit {
> +						temperature = <115000>;
> +						hysteresis = <2000>;
> +						type = "critical";
> +					};
> +				};
> +
> +				cooling-maps {
> +					map0 {
> +						trip = <&target>;
> +						cooling-device = <&cpu0
> +							THERMAL_NO_LIMIT
> +							THERMAL_NO_LIMIT>,
> +								 <&cpu1
> +							THERMAL_NO_LIMIT
> +							THERMAL_NO_LIMIT>,
> +								 <&cpu2
> +							THERMAL_NO_LIMIT
> +							THERMAL_NO_LIMIT>,
> +								 <&cpu3
> +							THERMAL_NO_LIMIT
> +							THERMAL_NO_LIMIT>;
> +						contribution = <3072>;
> +					};
> +					map1 {
> +						trip = <&target>;
> +						cooling-device = <&cpu4
> +							THERMAL_NO_LIMIT
> +							THERMAL_NO_LIMIT>,
> +								 <&cpu5
> +							THERMAL_NO_LIMIT
> +							THERMAL_NO_LIMIT>,
> +								 <&cpu6
> +							THERMAL_NO_LIMIT
> +							THERMAL_NO_LIMIT>,
> +								 <&cpu7
> +							THERMAL_NO_LIMIT
> +							THERMAL_NO_LIMIT>;
> +						contribution = <1024>;
> +					};
> +				};
>  			};
>  
>  			/* The tzts1 ~ tzts6 don't need to polling */

Gentally remind, do you have any comments?
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[PATCH v3, 5/8] arm64: dts: mt8183: Increase polling frequency for CPU thermal zone

[Michael Kao]

From: Matthias Kaehlcke <mka@chromium.org>

Evaluate the thermal zone every 500ms while not cooling and every
100ms when passive cooling is performed.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Michael Kao <michael.kao@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 78575c3183a4..042ef48f3efe 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -605,8 +605,8 @@
 
 		thermal-zones {
 			cpu_thermal: cpu_thermal {
-				polling-delay-passive = <1000>;
-				polling-delay = <1000>;
+				polling-delay-passive = <100>;
+				polling-delay = <500>;
 				thermal-sensors = <&thermal 0>;
 				sustainable-power = <5000>;
 
-- 
2.18.0
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[PATCH v3,6/8] thermal: mediatek: mt8183: fix bank number settings

[Michael Kao]

MT8183_NUM_ZONES should be set to 1
because MT8183 doesn't have multiple banks.

Fixes: a4ffe6b52d27 ("thermal: mediatek: add support for MT8183")
Signed-off-by: Michael Kao <michael.kao@mediatek.com>
---
 drivers/thermal/mtk_thermal.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index acf4854cbb8b..d6fabd0a7da6 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -211,6 +211,9 @@ enum {
 /* The total number of temperature sensors in the MT8183 */
 #define MT8183_NUM_SENSORS	6
 
+/* The number of banks in the MT8183 */
+#define MT8183_NUM_ZONES               1
+
 /* The number of sensing points per bank */
 #define MT8183_NUM_SENSORS_PER_ZONE	 6
 
@@ -498,7 +501,7 @@ static const struct mtk_thermal_data mt7622_thermal_data = {
 
 static const struct mtk_thermal_data mt8183_thermal_data = {
 	.auxadc_channel = MT8183_TEMP_AUXADC_CHANNEL,
-	.num_banks = MT8183_NUM_SENSORS_PER_ZONE,
+	.num_banks = MT8183_NUM_ZONES,
 	.num_sensors = MT8183_NUM_SENSORS,
 	.vts_index = mt8183_vts_index,
 	.cali_val = MT8183_CALIBRATION,
-- 
2.18.0
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Re: [PATCH v3, 6/8] thermal: mediatek: mt8183: fix bank number settings

[Hsin-Yi Wang]

On Fri, Jan 3, 2020 at 2:44 PM Michael Kao <michael.kao@mediatek.com> wrote:
>
> MT8183_NUM_ZONES should be set to 1
> because MT8183 doesn't have multiple banks.
>
> Fixes: a4ffe6b52d27 ("thermal: mediatek: add support for MT8183")
> Signed-off-by: Michael Kao <michael.kao@mediatek.com>
> ---
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>

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[PATCH v3, 7/8] thermal: mediatek: add another get_temp ops for thermal sensors

[Michael Kao]

Provide thermal zone to read thermal sensor
in the SoC. We can read all the thermal sensors
value in the SoC by the node /sys/class/thermal/

Bypass the failure that non cpu_thermal sensor is not find in thermal-zones
in dts, which is normal for mt8173, so prompt a warning here instead of
failing.

Return -EAGAIN instead of -EACCESS on the first read of sensor that
often are bogus values. This can avoid following warning on boot:

  thermal thermal_zone6: failed to read out thermal zone (-13)

Signed-off-by: Michael Kao <michael.kao@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
 drivers/thermal/mtk_thermal.c | 74 +++++++++++++++++++++++++++++++----
 1 file changed, 66 insertions(+), 8 deletions(-)

diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index d6fabd0a7da6..9be9fcb18d9e 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -225,6 +225,11 @@ enum {
 
 struct mtk_thermal;
 
+struct mtk_thermal_zone {
+	struct mtk_thermal *mt;
+	int id;
+};
+
 struct thermal_bank_cfg {
 	unsigned int num_sensors;
 	const int *sensors;
@@ -607,7 +612,7 @@ static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank)
 		 * not immediately shut down.
 		 */
 		if (temp > 200000)
-			temp = 0;
+			temp = -EAGAIN;
 
 		if (temp > max)
 			max = temp;
@@ -618,7 +623,8 @@ static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank)
 
 static int mtk_read_temp(void *data, int *temperature)
 {
-	struct mtk_thermal *mt = data;
+	struct mtk_thermal_zone *tz = data;
+	struct mtk_thermal *mt = tz->mt;
 	int i;
 	int tempmax = INT_MIN;
 
@@ -631,16 +637,48 @@ static int mtk_read_temp(void *data, int *temperature)
 
 		mtk_thermal_put_bank(bank);
 	}
-
 	*temperature = tempmax;
 
 	return 0;
 }
 
+static int mtk_read_sensor_temp(void *data, int *temperature)
+{
+	struct mtk_thermal_zone *tz = data;
+	struct mtk_thermal *mt = tz->mt;
+	const struct mtk_thermal_data *conf = mt->conf;
+	int id = tz->id - 1;
+	int temp = INT_MIN;
+	u32 raw;
+
+	if (id < 0)
+		return  -EACCES;
+
+	raw = readl(mt->thermal_base + conf->msr[id]);
+
+	temp = raw_to_mcelsius(mt, id, raw);
+
+	/*
+	 * The first read of a sensor often contains very high bogus
+	 * temperature value. Filter these out so that the system does
+	 * not immediately shut down.
+	 */
+
+	if (temp > 200000)
+		return  -EAGAIN;
+
+	*temperature = temp;
+	return 0;
+}
+
 static const struct thermal_zone_of_device_ops mtk_thermal_ops = {
 	.get_temp = mtk_read_temp,
 };
 
+static const struct thermal_zone_of_device_ops mtk_thermal_sensor_ops = {
+	.get_temp = mtk_read_sensor_temp,
+};
+
 static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
 				  u32 apmixed_phys_base, u32 auxadc_phys_base,
 				  int ctrl_id)
@@ -873,6 +911,7 @@ static int mtk_thermal_probe(struct platform_device *pdev)
 	struct resource *res;
 	u64 auxadc_phys_base, apmixed_phys_base;
 	struct thermal_zone_device *tzdev;
+	struct mtk_thermal_zone *tz;
 
 	mt = devm_kzalloc(&pdev->dev, sizeof(*mt), GFP_KERNEL);
 	if (!mt)
@@ -954,11 +993,30 @@ static int mtk_thermal_probe(struct platform_device *pdev)
 
 	platform_set_drvdata(pdev, mt);
 
-	tzdev = devm_thermal_zone_of_sensor_register(&pdev->dev, 0, mt,
-						     &mtk_thermal_ops);
-	if (IS_ERR(tzdev)) {
-		ret = PTR_ERR(tzdev);
-		goto err_disable_clk_peri_therm;
+	for (i = 0; i < mt->conf->num_sensors + 1; i++) {
+		tz = kmalloc(sizeof(*tz), GFP_KERNEL);
+		if (!tz)
+			return -ENOMEM;
+
+		tz->mt = mt;
+		tz->id = i;
+
+		tzdev = devm_thermal_zone_of_sensor_register(&pdev->dev, i,
+				tz, (i == 0) ?
+				&mtk_thermal_ops : &mtk_thermal_sensor_ops);
+
+		if (IS_ERR(tzdev)) {
+			if (PTR_ERR(tzdev) == -ENODEV) {
+				dev_warn(&pdev->dev,
+					"sensor %d not registered in thermal zone in dt\n",
+					i);
+				continue;
+			}
+			if (IS_ERR(tzdev) != -EACCES) {
+				ret = PTR_ERR(tzdev);
+				goto err_disable_clk_peri_therm;
+			}
+		}
 	}
 
 	return 0;
-- 
2.18.0
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[PATCH v3,8/8] thermal: mediatek: use spinlock to protect PTPCORESEL

[Michael Kao]

From: "michael.kao" <michael.kao@mediatek.com>

The driver of thermal and svs will use the
same register for the project which should select
bank before reading sensor value.

Signed-off-by: Michael Kao <michael.kao@mediatek.com>
---
 drivers/thermal/mtk_thermal.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index 9be9fcb18d9e..639d34ed223b 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -22,6 +22,7 @@
 #include <linux/thermal.h>
 #include <linux/reset.h>
 #include <linux/types.h>
+#include <linux/power/mtk_svs.h>
 
 /* AUXADC Registers */
 #define AUXADC_CON1_SET_V	0x008
@@ -262,7 +263,7 @@ struct mtk_thermal {
 	struct clk *clk_peri_therm;
 	struct clk *clk_auxadc;
 	/* lock: for getting and putting banks */
-	struct mutex lock;
+	unsigned long flags;
 
 	/* Calibration values */
 	s32 adc_ge;
@@ -561,7 +562,7 @@ static void mtk_thermal_get_bank(struct mtk_thermal_bank *bank)
 	u32 val;
 
 	if (mt->conf->need_switch_bank) {
-		mutex_lock(&mt->lock);
+		mt->flags = claim_mtk_svs_lock();
 
 		val = readl(mt->thermal_base + PTPCORESEL);
 		val &= ~0xf;
@@ -581,7 +582,7 @@ static void mtk_thermal_put_bank(struct mtk_thermal_bank *bank)
 	struct mtk_thermal *mt = bank->mt;
 
 	if (mt->conf->need_switch_bank)
-		mutex_unlock(&mt->lock);
+		release_mtk_svs_lock(mt->flags);
 }
 
 /**
@@ -936,8 +937,6 @@ static int mtk_thermal_probe(struct platform_device *pdev)
 	if (ret)
 		return ret;
 
-	mutex_init(&mt->lock);
-
 	mt->dev = &pdev->dev;
 
 	auxadc = of_parse_phandle(np, "mediatek,auxadc", 0);
-- 
2.18.0
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