From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Will Deacon <will@kernel.org>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
Nicolas Boichat <drinkcat@chromium.org>,
srv_heupstream@mediatek.com, chao.hao@mediatek.com,
kernel-team@android.com, linux-kernel@vger.kernel.org,
Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
iommu@lists.linux-foundation.org,
linux-mediatek@lists.infradead.org, yong.wu@mediatek.com,
ming-fan.chen@mediatek.com, anan.sun@mediatek.com,
Greg Kroah-Hartman <gregkh@google.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 19/24] iommu/mediatek: Support up to 34bit iova in tlb flush
Date: Wed, 30 Sep 2020 15:06:42 +0800 [thread overview]
Message-ID: <20200930070647.10188-20-yong.wu@mediatek.com> (raw)
In-Reply-To: <20200930070647.10188-1-yong.wu@mediatek.com>
If the iova is 34bit, the iova[32][33] is the bit0/1 in the tlb flush
register. Add a new macro for this.
there is a minor change unrelated with this patch. it also use the new
macro.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
drivers/iommu/mtk_iommu.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 2f26a8242428..a2e519c86ce9 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -125,6 +125,9 @@ static const struct iommu_ops mtk_iommu_ops;
static int mtk_iommu_hw_init(const struct mtk_iommu_data *data);
+#define MTK_IOMMU_ADDR(addr) ({unsigned long _addr = addr; \
+ (lower_32_bits(_addr) | upper_32_bits(_addr)); })
+
/*
* In M4U 4GB mode, the physical address is remapped as below:
*
@@ -213,8 +216,9 @@ static void mtk_iommu_tlb_flush_range_sync(unsigned long iova, size_t size,
writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,
data->base + data->plat_data->inv_sel_reg);
- writel_relaxed(iova, data->base + REG_MMU_INVLD_START_A);
- writel_relaxed(iova + size - 1,
+ writel_relaxed(MTK_IOMMU_ADDR(iova),
+ data->base + REG_MMU_INVLD_START_A);
+ writel_relaxed(MTK_IOMMU_ADDR(iova + size - 1),
data->base + REG_MMU_INVLD_END_A);
writel_relaxed(F_MMU_INV_RANGE,
data->base + REG_MMU_INVALIDATE);
@@ -634,8 +638,7 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data)
if (data->plat_data->m4u_plat == M4U_MT8173)
regval = (data->protect_base >> 1) | (data->enable_4GB << 31);
else
- regval = lower_32_bits(data->protect_base) |
- upper_32_bits(data->protect_base);
+ regval = MTK_IOMMU_ADDR(data->protect_base);
writel_relaxed(regval, data->base + REG_MMU_IVRP_PADDR);
if (data->enable_4GB &&
--
2.18.0
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next prev parent reply other threads:[~2020-09-30 7:17 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-30 7:06 [PATCH v3 00/24] MT8192 IOMMU support Yong Wu
2020-09-30 7:06 ` [PATCH v3 01/24] dt-bindings: iommu: mediatek: Convert IOMMU to DT schema Yong Wu
2020-10-02 10:58 ` Krzysztof Kozlowski
2020-10-02 11:07 ` Krzysztof Kozlowski
2020-10-06 4:26 ` Yong Wu
2020-10-12 17:08 ` Krzysztof Kozlowski
2020-09-30 7:06 ` [PATCH v3 02/24] dt-bindings: memory: mediatek: Convert SMI " Yong Wu
2020-10-02 11:04 ` Krzysztof Kozlowski
2020-10-02 11:08 ` Krzysztof Kozlowski
2020-10-06 4:27 ` Yong Wu
2020-10-06 7:15 ` Krzysztof Kozlowski
2020-10-10 6:18 ` Yong Wu
2020-10-12 7:18 ` Krzysztof Kozlowski
2020-10-12 12:01 ` Yong Wu
2020-10-12 13:26 ` Krzysztof Kozlowski
2020-09-30 7:06 ` [PATCH v3 03/24] dt-bindings: memory: mediatek: Add a common larb-port header file Yong Wu
2020-09-30 7:06 ` [PATCH v3 04/24] dt-bindings: memory: mediatek: Extend LARB_NR_MAX to 32 Yong Wu
2020-09-30 7:06 ` [PATCH v3 05/24] dt-bindings: memory: mediatek: Add domain definition Yong Wu
2020-09-30 7:06 ` [PATCH v3 06/24] dt-bindings: mediatek: Add binding for mt8192 IOMMU Yong Wu
2020-10-02 11:10 ` Krzysztof Kozlowski
2020-10-06 4:26 ` Yong Wu
2020-10-06 7:19 ` Krzysztof Kozlowski
2020-09-30 7:06 ` [PATCH v3 07/24] iommu/mediatek: Use the common mtk-smi-larb-port.h Yong Wu
2020-09-30 7:06 ` [PATCH v3 08/24] iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap Yong Wu
2020-10-23 11:17 ` Will Deacon
2020-10-26 7:49 ` Yong Wu
2020-09-30 7:06 ` [PATCH v3 09/24] iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek Yong Wu
2020-10-23 11:22 ` Will Deacon
2020-09-30 7:06 ` [PATCH v3 10/24] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros Yong Wu
2020-10-23 11:23 ` Will Deacon
2020-09-30 7:06 ` [PATCH v3 11/24] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek Yong Wu
2020-10-23 11:21 ` Will Deacon
2020-10-26 7:45 ` Yong Wu
2020-10-23 14:10 ` Robin Murphy
2020-10-26 7:41 ` Yong Wu
2020-10-26 11:35 ` Robin Murphy
2020-09-30 7:06 ` [PATCH v3 12/24] iommu/mediatek: Move hw_init into attach_device Yong Wu
2020-09-30 7:06 ` [PATCH v3 13/24] iommu/mediatek: Add device link for smi-common and m4u Yong Wu
2020-09-30 7:06 ` [PATCH v3 14/24] iommu/mediatek: Add pm runtime callback Yong Wu
2020-09-30 7:06 ` [PATCH v3 15/24] iommu/mediatek: Add power-domain operation Yong Wu
2020-09-30 7:06 ` [PATCH v3 16/24] iommu/mediatek: Add iova reserved function Yong Wu
2020-09-30 7:06 ` [PATCH v3 17/24] iommu/mediatek: Add single domain Yong Wu
2020-09-30 7:06 ` [PATCH v3 18/24] iommu/mediatek: Support master use iova over 32bit Yong Wu
2020-10-06 7:18 ` Krzysztof Kozlowski
2020-09-30 7:06 ` Yong Wu [this message]
2020-09-30 7:06 ` [PATCH v3 20/24] iommu/mediatek: Support report iova 34bit translation fault in ISR Yong Wu
2020-09-30 7:06 ` [PATCH v3 21/24] iommu/mediatek: Add support for multi domain Yong Wu
2020-09-30 7:06 ` [PATCH v3 22/24] iommu/mediatek: Adjust the structure Yong Wu
2020-09-30 7:06 ` [PATCH v3 23/24] iommu/mediatek: Add mt8192 support Yong Wu
2020-09-30 7:06 ` [PATCH v3 24/24] memory: mtk-smi: " Yong Wu
2020-10-02 11:15 ` Krzysztof Kozlowski
2020-10-26 20:08 ` [PATCH v3 00/24] MT8192 IOMMU support Krzysztof Kozlowski
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