[RFC 0/3] add available pwm for bananapi-r64

[RFC 0/3] add available pwm for bananapi-r64

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

- mt7622 provides 6 pwm channels and only one is configured in dts
- pinctl-driver contains 7 pwm-channels where one is currently used.
- Mediatek confirmed that pwm7 does not exist and so dts is wrong
  and also the pinctrl definitions.

Frank Wunderlich (3):
  dts64: mt7622: enable all pwm for bananapi r64
  dts64: mt7622: disable spi1 and uart2 because pins are used by pwm
  pinctl: mt7622: drop pwm ch7 as mt7622 only has 6 channels

 .../boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts   | 13 ++++++++-----
 drivers/pinctrl/mediatek/pinctrl-mt7622.c           | 13 +------------
 2 files changed, 9 insertions(+), 17 deletions(-)

-- 
2.25.1


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[RFC 1/3] dts64: mt7622: enable all pwm for bananapi r64

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

mt7622 only supports 6 pwm-channels so drop pwm7

third pwm (pwm2) is inverted and connected to fan-socket

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
---
 .../boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts     | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
index 1cc4dcb0008c..ad5b1592182d 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
@@ -414,10 +414,15 @@ mux {
 		};
 	};
 
-	pwm7_pins: pwm1-2-pins {
+	pwm_pins: pwm-pins {
 		mux {
 			function = "pwm";
-			groups = "pwm_ch7_2";
+			groups = "pwm_ch1_0", /* mt7622_pwm_ch1_0_pins[] = { 51, }; */
+				 "pwm_ch2_0", /* mt7622_pwm_ch2_0_pins[] = { 52, }; */
+				 "pwm_ch3_2", /* mt7622_pwm_ch3_2_pins[] = { 97, }; */
+				 "pwm_ch4_1", /* mt7622_pwm_ch4_1_pins[] = { 67, }; */
+				 "pwm_ch5_0", /* mt7622_pwm_ch5_0_pins[] = { 68, }; */
+				 "pwm_ch6_0"; /* mt7622_pwm_ch6_0_pins[] = { 69, }; */
 		};
 	};
 
@@ -537,7 +542,7 @@ mux {
 
 &pwm {
 	pinctrl-names = "default";
-	pinctrl-0 = <&pwm7_pins>;
+	pinctrl-0 = <&pwm_pins>;
 	status = "okay";
 };
 
-- 
2.25.1


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[RFC 2/3] dts64: mt7622: disable spi1 and uart2 because pins are used by pwm

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

MDI_TP_P0 (gpio51) is used by pwm1 and uart2 (uart1 on gpio-header)
MDI_RP_P4 (gpio67) is used by pwm4 and spi1

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
---
 arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
index ad5b1592182d..74a843e6d107 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
@@ -570,7 +570,6 @@ &spi0 {
 &spi1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&spic1_pins>;
-	status = "okay";
 };
 
 &ssusb {
@@ -592,7 +591,6 @@ &uart0 {
 &uart2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart2_pins>;
-	status = "okay";
 };
 
 &watchdog {
-- 
2.25.1


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[RFC 3/3] pinctl: mt7622: drop pwm ch7 as mt7622 only has 6 channels

[Frank Wunderlich]

From: Frank Wunderlich <frank-w@public-files.de>

mt7622 is reported by mediatek to have only 6 pwm channels
so drop pindefines for 7th channel

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
---
 drivers/pinctrl/mediatek/pinctrl-mt7622.c | 13 +------------
 1 file changed, 1 insertion(+), 12 deletions(-)

diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7622.c b/drivers/pinctrl/mediatek/pinctrl-mt7622.c
index ce4a8a0cc19c..260ffadd24e4 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mt7622.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt7622.c
@@ -439,12 +439,6 @@ static int mt7622_pwm_ch6_2_pins[] = { 81, };
 static int mt7622_pwm_ch6_2_funcs[] = { 4, };
 static int mt7622_pwm_ch6_3_pins[] = { 100, };
 static int mt7622_pwm_ch6_3_funcs[] = { 0, };
-static int mt7622_pwm_ch7_0_pins[] = { 70, };
-static int mt7622_pwm_ch7_0_funcs[] = { 3, };
-static int mt7622_pwm_ch7_1_pins[] = { 82, };
-static int mt7622_pwm_ch7_1_funcs[] = { 4, };
-static int mt7622_pwm_ch7_2_pins[] = { 101, };
-static int mt7622_pwm_ch7_2_funcs[] = { 0, };
 
 /* SD */
 static int mt7622_sd_0_pins[] = { 16, 17, 18, 19, 20, 21, };
@@ -611,9 +605,6 @@ static const struct group_desc mt7622_groups[] = {
 	PINCTRL_PIN_GROUP("pwm_ch6_1", mt7622_pwm_ch6_1),
 	PINCTRL_PIN_GROUP("pwm_ch6_2", mt7622_pwm_ch6_2),
 	PINCTRL_PIN_GROUP("pwm_ch6_3", mt7622_pwm_ch6_3),
-	PINCTRL_PIN_GROUP("pwm_ch7_0", mt7622_pwm_ch7_0),
-	PINCTRL_PIN_GROUP("pwm_ch7_1", mt7622_pwm_ch7_1),
-	PINCTRL_PIN_GROUP("pwm_ch7_2", mt7622_pwm_ch7_2),
 	PINCTRL_PIN_GROUP("sd_0", mt7622_sd_0),
 	PINCTRL_PIN_GROUP("sd_1", mt7622_sd_1),
 	PINCTRL_PIN_GROUP("snfi", mt7622_snfi),
@@ -700,9 +691,7 @@ static const char *mt7622_pwm_groups[] = { "pwm_ch1_0", "pwm_ch1_1",
 					   "pwm_ch4_3", "pwm_ch5_0",
 					   "pwm_ch5_1", "pwm_ch5_2",
 					   "pwm_ch6_0", "pwm_ch6_1",
-					   "pwm_ch6_2", "pwm_ch6_3",
-					   "pwm_ch7_0", "pwm_ch7_1",
-					   "pwm_ch7_2", };
+					   "pwm_ch6_2", "pwm_ch6_3", };
 static const char *mt7622_sd_groups[] = { "sd_0", "sd_1", };
 static const char *mt7622_spic_groups[] = { "spic0_0", "spic0_1", "spic1_0",
 					    "spic1_1", "spic2_0",
-- 
2.25.1


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Re: [RFC 3/3] pinctl: mt7622: drop pwm ch7 as mt7622 only has 6 channels

[Linus Walleij]

On Fri, Oct 16, 2020 at 10:40 PM Frank Wunderlich <linux@fw-web.de> wrote:

> From: Frank Wunderlich <frank-w@public-files.de>
>
> mt7622 is reported by mediatek to have only 6 pwm channels
> so drop pindefines for 7th channel
>
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>

I can merge this patch to the pinctrl tree if I get some kind of
review response from one of the Mediatek maintainers.

The rest should probably go through ARM SoC.

Yours,
Linus Walleij

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Re: [RFC 3/3] pinctl: mt7622: drop pwm ch7 as mt7622 only has 6 channels

[Sean Wang]

> > mt7622 is reported by mediatek to have only 6 pwm channels
> > so drop pindefines for 7th channel
> >
> > Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
>
> I can merge this patch to the pinctrl tree if I get some kind of
> review response from one of the Mediatek maintainers.
>

After confirming with the internal team, MT7622 actually does not have
the 7th channel. Thanks for Frank's catchup and patch.

Acked-by: Sean Wang <sean.wang@kernel.org>

> The rest should probably go through ARM SoC.
>
> Yours,
> Linus Walleij

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Re: [RFC 3/3] pinctl: mt7622: drop pwm ch7 as mt7622 only has 6 channels

[Linus Walleij]

On Fri, Oct 16, 2020 at 10:40 PM Frank Wunderlich <linux@fw-web.de> wrote:

> From: Frank Wunderlich <frank-w@public-files.de>
>
> mt7622 is reported by mediatek to have only 6 pwm channels
> so drop pindefines for 7th channel
>
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>

This patch (3/3) applied to the pinctrl tree.

Please apply 1-2 to the ARM SoC tree.

Yours,
Linus Walleij

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Re: [RFC 1/3] dts64: mt7622: enable all pwm for bananapi r64

[Matthias Brugger]

On 16/10/2020 22:40, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@public-files.de>
> 
> mt7622 only supports 6 pwm-channels so drop pwm7
> 
> third pwm (pwm2) is inverted and connected to fan-socket
> 
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>

Patch 1 and 2 now pushed to v5.10-next/dts64

Thanks!

> ---
>   .../boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts     | 11 ++++++++---
>   1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
> index 1cc4dcb0008c..ad5b1592182d 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
> @@ -414,10 +414,15 @@ mux {
>   		};
>   	};
>   
> -	pwm7_pins: pwm1-2-pins {
> +	pwm_pins: pwm-pins {
>   		mux {
>   			function = "pwm";
> -			groups = "pwm_ch7_2";
> +			groups = "pwm_ch1_0", /* mt7622_pwm_ch1_0_pins[] = { 51, }; */
> +				 "pwm_ch2_0", /* mt7622_pwm_ch2_0_pins[] = { 52, }; */
> +				 "pwm_ch3_2", /* mt7622_pwm_ch3_2_pins[] = { 97, }; */
> +				 "pwm_ch4_1", /* mt7622_pwm_ch4_1_pins[] = { 67, }; */
> +				 "pwm_ch5_0", /* mt7622_pwm_ch5_0_pins[] = { 68, }; */
> +				 "pwm_ch6_0"; /* mt7622_pwm_ch6_0_pins[] = { 69, }; */
>   		};
>   	};
>   
> @@ -537,7 +542,7 @@ mux {
>   
>   &pwm {
>   	pinctrl-names = "default";
> -	pinctrl-0 = <&pwm7_pins>;
> +	pinctrl-0 = <&pwm_pins>;
>   	status = "okay";
>   };
>   
> 

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