From: Yunfei Dong <yunfei.dong@mediatek.com>
To: Yunfei Dong <yunfei.dong@mediatek.com>,
Alexandre Courbot <acourbot@chromium.org>,
Hans Verkuil <hverkuil-cisco@xs4all.nl>,
"Tzung-Bi Shih" <tzungbi@chromium.org>,
Tiffany Lin <tiffany.lin@mediatek.com>,
Andrew-CT Chen <andrew-ct.chen@mediatek.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Tomasz Figa <tfiga@google.com>
Cc: Hsin-Yi Wang <hsinyi@chromium.org>,
Fritz Koenig <frkoenig@chromium.org>,
Irui Wang <irui.wang@mediatek.com>,
<linux-media@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<srv_heupstream@mediatek.com>,
<linux-mediatek@lists.infradead.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH v2, 12/14] dt-bindings: media: mtk-vcodec: Adds decoder dt-bindings for mt8192
Date: Sat, 17 Jul 2021 16:12:31 +0800 [thread overview]
Message-ID: <20210717081233.7809-13-yunfei.dong@mediatek.com> (raw)
In-Reply-To: <20210717081233.7809-1-yunfei.dong@mediatek.com>
Adds decoder dt-bindings for mt8192.
Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>
---
v2: using yaml format to instead of txt file.
---
.../media/mediatek-vcodec-comp-decoder.yaml | 150 ++++++++++++++++++
1 file changed, 150 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/mediatek-vcodec-comp-decoder.yaml
diff --git a/Documentation/devicetree/bindings/media/mediatek-vcodec-comp-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek-vcodec-comp-decoder.yaml
new file mode 100644
index 000000000000..48ecfe440902
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek-vcodec-comp-decoder.yaml
@@ -0,0 +1,150 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iommu/mediatek,vcodec-comp-decoder.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek Video Decode Accelerator With Component
+
+maintainers:
+ - Yunfei Dong <yunfei.dong@mediatek.com>
+
+description: |+
+ Mediatek Video Decode is the video decode hardware present in Mediatek
+ SoCs which supports high resolution decoding functionalities. Required
+ master and component node.
+
+properties:
+ compatible:
+ - description: used for master
+ - const: mediatek,mt8192-vcodec-dec
+ - description: used for component
+ - const: mediatek,mtk-vcodec-lat
+ - const: mediatek,mtk-vcodec-core
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 5
+
+ clock-names:
+ items:
+ - const: vdec_sel
+ - const: vdec-soc-vdec
+ - const: vdec-soc-lat
+ - const: vdec-vdec
+ - const: vdec-top
+
+ assigned-clocks: true
+
+ assigned-clock-parents: true
+
+ power-domains:
+ maxItems: 1
+
+ iommus:
+ minItems: 1
+ maxItems: 32
+ description: |
+ List of the hardware port in respective IOMMU block for current Socs.
+ Refer to bindings/iommu/mediatek,iommu.yaml.
+
+ dma-ranges:
+ maxItems: 1
+ description: |
+ Describes the physical address space of IOMMU maps to memory.
+
+ mediatek,scp:
+ maxItems: 1
+
+required:
+ master:
+ - compatible
+ - reg
+ - iommus
+ - mediatek,scp
+ - dma-ranges
+ component:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - iommus
+ - dma-ranges
+ - assigned-clocks
+ - assigned-clock-parents
+ - power-domains
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/memory/mt8192-larb-port.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ vcodec_dec: vcodec_dec@16000000 {
+ compatible = "mediatek,mt8192-vcodec-dec";
+ reg = <0 0x16000000 0 0x1000>; /* VDEC_SYS */
+ mediatek,scp = <&scp>;
+ iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>;
+ dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;
+ };
+
+ vcodec_lat: vcodec_lat@0x16010000 {
+ compatible = "mediatek,mtk-vcodec-lat";
+ reg = <0 0x16010000 0 0x800>; /* VDEC_MISC */
+ interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 0>;
+ iommus = <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD_EXT>,
+ <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD2_EXT>,
+ <&iommu0 M4U_PORT_L5_VDEC_LAT0_AVC_MV_EXT>,
+ <&iommu0 M4U_PORT_L5_VDEC_LAT0_PRED_RD_EXT>,
+ <&iommu0 M4U_PORT_L5_VDEC_LAT0_TILE_EXT>,
+ <&iommu0 M4U_PORT_L5_VDEC_LAT0_WDMA_EXT>,
+ <&iommu0 M4U_PORT_L5_VDEC_LAT0_RG_CTRL_DMA_EXT>,
+ <&iommu0 M4U_PORT_L5_VDEC_UFO_ENC_EXT>;
+ dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;
+ clocks = <&topckgen CLK_TOP_VDEC_SEL>,
+ <&vdecsys_soc CLK_VDEC_SOC_VDEC>,
+ <&vdecsys_soc CLK_VDEC_SOC_LAT>,
+ <&vdecsys_soc CLK_VDEC_SOC_LARB1>,
+ <&topckgen CLK_TOP_MAINPLL_D4>;
+ clock-names = "vdec-sel", "vdec-soc-vdec", "vdec-soc-lat",
+ "vdec-vdec", "vdec-top";
+ assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>;
+ assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D4>;
+ power-domains = <&spm MT8192_POWER_DOMAIN_VDEC>;
+ };
+
+ vcodec_core: vcodec_core@0x16025000 {
+ compatible = "mediatek,mtk-vcodec-core";
+ reg = <0 0x16025000 0 0x1000>; /* VDEC_CORE_MISC */
+ interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 0>;
+ iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_UFO_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_PP_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_PRED_RD_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_PRED_WR_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_PPWRAP_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_TILE_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_VLD_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_VLD2_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_AVC_MV_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_RG_CTRL_DMA_EXT>;
+ dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;
+ clocks = <&topckgen CLK_TOP_VDEC_SEL>,
+ <&vdecsys CLK_VDEC_VDEC>,
+ <&vdecsys CLK_VDEC_LAT>,
+ <&vdecsys CLK_VDEC_LARB1>,
+ <&topckgen CLK_TOP_MAINPLL_D4>;
+ clock-names = "vdec-sel", "vdec-soc-vdec", "vdec-soc-lat",
+ "vdec-vdec", "vdec-top";
+ assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>;
+ assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D4>;
+ power-domains = <&spm MT8192_POWER_DOMAIN_VDEC2>;
+ };
\ No newline at end of file
--
2.25.1
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next prev parent reply other threads:[~2021-07-17 8:16 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-17 8:12 [PATCH v2, 00/14] Using component framework to support multi hardware decode Yunfei Dong
2021-07-17 8:12 ` [PATCH v2, 01/14] media: mtk-vcodec: Get numbers of register bases from DT Yunfei Dong
2021-07-19 7:06 ` Dafna Hirschfeld
2021-07-17 8:12 ` [PATCH v2, 02/14] media: mtk-vcodec: Refactor vcodec pm interface Yunfei Dong
2021-07-17 8:12 ` [PATCH v2, 03/14] media: mtk-vcodec: Use component framework to manage each hardware information Yunfei Dong
2021-07-19 9:00 ` Dafna Hirschfeld
2021-07-24 8:18 ` mtk12024
2021-07-17 8:12 ` [PATCH v2, 04/14] dt-bindings: media: mtk-vcodec: Separate video encoder and decoder dt-bindings Yunfei Dong
2021-07-19 9:05 ` Dafna Hirschfeld
2021-07-17 8:12 ` [PATCH v2, 05/14] media: mtk-vcodec: Use pure single core for MT8183 Yunfei Dong
2021-07-17 8:12 ` [PATCH v2, 06/14] media: mtk-vcodec: Add irq interface for core hardware Yunfei Dong
2021-07-19 9:25 ` Dafna Hirschfeld
2021-07-17 8:12 ` [PATCH v2, 07/14] media: mtk-vcodec: Add msg queue feature for lat and core architecture Yunfei Dong
2021-07-19 9:57 ` Dafna Hirschfeld
2021-07-24 9:15 ` mtk12024
2021-07-17 8:12 ` [PATCH v2, 08/14] media: mtk-vcodec: Generalize power and clock on/off interfaces Yunfei Dong
2021-07-17 8:12 ` [PATCH v2, 09/14] media: mtk-vcodec: Add new interface to lock different hardware Yunfei Dong
2021-07-17 8:12 ` [PATCH v2, 10/14] media: mtk-vcodec: Add core thread Yunfei Dong
2021-07-19 10:11 ` Dafna Hirschfeld
2021-07-17 8:12 ` [PATCH v2, 11/14] media: mtk-vcodec: Support 34bits dma address for vdec Yunfei Dong
2021-07-17 8:12 ` Yunfei Dong [this message]
2021-07-19 13:47 ` [PATCH v2, 12/14] dt-bindings: media: mtk-vcodec: Adds decoder dt-bindings for mt8192 Rob Herring
2021-07-17 8:12 ` [PATCH v2, 13/14] media: mtk-vcodec: Add core dec and dec end ipi msg Yunfei Dong
2021-07-17 8:12 ` [PATCH v2, 14/14] media: mtk-vcodec: Use codec type to separate different hardware Yunfei Dong
2021-07-19 10:26 ` Dafna Hirschfeld
2021-07-19 7:00 ` [PATCH v2, 00/14] Using component framework to support multi hardware decode Dafna Hirschfeld
2021-07-22 11:44 ` mtk12024
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