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From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
	Tomasz Figa <tfiga@chromium.org>,
	<linux-mediatek@lists.infradead.org>,
	<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<iommu@lists.linux-foundation.org>, <yong.wu@mediatek.com>,
	<youlin.pei@mediatek.com>,
	Nicolas Boichat <drinkcat@chromium.org>, <anan.sun@mediatek.com>,
	<chao.hao@mediatek.com>
Subject: [PATCH v2 26/29] iommu/mediatek: Get the proper bankid for multi banks
Date: Fri, 13 Aug 2021 14:53:21 +0800	[thread overview]
Message-ID: <20210813065324.29220-27-yong.wu@mediatek.com> (raw)
In-Reply-To: <20210813065324.29220-1-yong.wu@mediatek.com>

We preassign some ports in a special bank via the new defined
bank_portmsk. Put it in the plat_data means it is not expected to be
adjusted dynamically.

If the iommu id in the iommu consumer's dtsi node is inside this
bank_portmsk, then we switch it to this special iommu bank, and initialise
the IOMMU bank HW.

Each a bank has the independent pgtable(4GB iova range). Each a bank
is a independent iommu domain/group. Currently we don't separate different
iova ranges inside a bank.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
 drivers/iommu/mtk_iommu.c | 38 +++++++++++++++++++++++++++++++++++---
 drivers/iommu/mtk_iommu.h |  1 +
 2 files changed, 36 insertions(+), 3 deletions(-)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 29b9ab528774..ce83569eec21 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -358,6 +358,30 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
 	return IRQ_HANDLED;
 }
 
+static unsigned int mtk_iommu_get_bank_id(struct device *dev,
+					  const struct mtk_iommu_plat_data *plat_data)
+{
+	struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
+	unsigned int i, portmsk = 0, bankid = 0; /* bank default is 0 */
+
+	if (plat_data->bank_nr == 1)
+		return bankid;
+
+	for (i = 0; i < fwspec->num_ids; i++)
+		portmsk |= BIT(MTK_M4U_TO_PORT(fwspec->ids[i]));
+
+	for (i = 0; i < plat_data->bank_nr; i++) {
+		if (!plat_data->bank_enable[i])
+			continue;
+
+		if (portmsk & plat_data->bank_portmsk[i]) {
+			bankid = i;
+			break;
+		}
+	}
+	return bankid;
+}
+
 static int mtk_iommu_get_iova_region_id(struct device *dev,
 					const struct mtk_iommu_plat_data *plat_data)
 {
@@ -516,13 +540,14 @@ static int mtk_iommu_attach_device(struct iommu_domain *domain,
 	struct list_head *hw_list = data->hw_list;
 	struct mtk_iommu_bank_data *bank;
 	struct device *m4udev = data->dev;
-	unsigned int bankid = 0;
+	unsigned int bankid;
 	int ret, region_id;
 
 	region_id = mtk_iommu_get_iova_region_id(dev, data->plat_data);
 	if (region_id < 0)
 		return region_id;
 
+	bankid = mtk_iommu_get_bank_id(dev, data->plat_data);
 	bank = &data->bank[bankid];
 	if (!dom->bank) {
 		/* Data is in the frstdata in sharing pgtable case. */
@@ -653,6 +678,7 @@ static struct iommu_group *mtk_iommu_device_group(struct device *dev)
 	struct mtk_iommu_data *c_data = dev_iommu_priv_get(dev), *data;
 	struct list_head *hw_list = c_data->hw_list;
 	struct iommu_group *group;
+	unsigned int bankid, groupid;
 	int regionid;
 
 	data = mtk_iommu_get_frst_data(hw_list);
@@ -662,12 +688,18 @@ static struct iommu_group *mtk_iommu_device_group(struct device *dev)
 	regionid = mtk_iommu_get_iova_region_id(dev, data->plat_data);
 	if (regionid < 0)
 		return ERR_PTR(regionid);
+	bankid = mtk_iommu_get_bank_id(dev, data->plat_data);
 
-	group = data->m4u_group[regionid];
+	/*
+	 * If the bank function is enabled, each a bank is a iommu group/domain.
+	 * otherwise, each a iova region is a iommu group/domain.
+	 */
+	groupid = bankid ? bankid : regionid;
+	group = data->m4u_group[groupid];
 	if (!group) {
 		group = iommu_group_alloc();
 		if (!IS_ERR(group))
-			data->m4u_group[regionid] = group;
+			data->m4u_group[groupid] = group;
 	} else {
 		iommu_group_ref_get(group);
 	}
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index 7a8d6a233d14..905d8740dbcf 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -65,6 +65,7 @@ struct mtk_iommu_plat_data {
 
 	unsigned int        bank_nr;
 	bool                bank_enable[MTK_IOMMU_BANK_MAX];
+	unsigned int        bank_portmsk[MTK_IOMMU_BANK_MAX];
 	unsigned char       larbid_remap[MTK_LARB_COM_MAX][MTK_LARB_SUBCOM_MAX];
 };
 
-- 
2.18.0
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  parent reply	other threads:[~2021-08-13  7:14 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-13  6:52 [PATCH v2 00/29] MT8195 IOMMU SUPPORT Yong Wu
2021-08-13  6:52 ` [PATCH v2 01/29] dt-bindings: mediatek: mt8195: Add binding for MM IOMMU Yong Wu
2021-08-13  6:52 ` [PATCH v2 02/29] dt-bindings: mediatek: mt8195: Add binding for infra IOMMU Yong Wu
2021-08-17 21:44   ` Rob Herring
2021-08-13  6:52 ` [PATCH v2 03/29] iommu/mediatek: Fix 2 HW sharing pgtable issue Yong Wu
2021-08-13  6:52 ` [PATCH v2 04/29] iommu/mediatek: Adapt sharing and non-sharing pgtable case Yong Wu
2021-08-13  6:53 ` [PATCH v2 05/29] iommu/mediatek: Add 12G~16G support for multi domains Yong Wu
2021-08-13  6:53 ` [PATCH v2 06/29] iommu/mediatek: Add a flag DCM_DISABLE Yong Wu
2021-08-13  6:53 ` [PATCH v2 07/29] iommu/mediatek: Add a flag NON_STD_AXI Yong Wu
2021-08-13  6:53 ` [PATCH v2 08/29] iommu/mediatek: Remove for_each_m4u in tlb_sync_all Yong Wu
2021-08-13  6:53 ` [PATCH v2 09/29] iommu/mediatek: Add tlb_lock in tlb_flush_all Yong Wu
2021-08-13  6:53 ` [PATCH v2 10/29] iommu/mediatek: Remove the granule in the tlb flush Yong Wu
2021-08-13  6:53 ` [PATCH v2 11/29] iommu/mediatek: Always pm_runtime_get while " Yong Wu
2021-08-24  7:10   ` Hsin-Yi Wang
2021-09-01 12:10     ` Yong Wu (吴勇)
2021-09-30 11:26   ` Dafna Hirschfeld
2021-10-07  3:00     ` Yong Wu
2021-08-13  6:53 ` [PATCH v2 12/29] iommu/mediatek: Always enable output PA over 32bits in isr Yong Wu
2021-08-13  6:53 ` [PATCH v2 13/29] iommu/mediatek: Add SUB_COMMON_3BITS flag Yong Wu
2021-08-13  6:53 ` [PATCH v2 14/29] iommu/mediatek: Add IOMMU_TYPE flag Yong Wu
2021-08-13  6:53 ` [PATCH v2 15/29] iommu/mediatek: Contain MM IOMMU flow with the MM TYPE Yong Wu
2021-08-13  6:53 ` [PATCH v2 16/29] iommu/mediatek: Adjust device link when it is sub-common Yong Wu
2021-08-24  7:35   ` Hsin-Yi Wang
2021-09-01 12:01     ` Yong Wu (吴勇)
2021-08-13  6:53 ` [PATCH v2 17/29] iommu/mediatek: Add infra iommu support Yong Wu
2021-08-13  6:53 ` [PATCH v2 18/29] iommu/mediatek: Add PCIe support Yong Wu
2021-08-13  6:53 ` [PATCH v2 19/29] iommu/mediatek: Add mt8195 support Yong Wu
2021-08-13  6:53 ` [PATCH v2 20/29] iommu/mediatek: Only adjust code about register base Yong Wu
2021-08-13  6:53 ` [PATCH v2 21/29] iommu/mediatek: Just move code position in hw_init Yong Wu
2021-08-13  6:53 ` [PATCH v2 22/29] iommu/mediatek: Add mtk_iommu_bank_data structure Yong Wu
2021-08-13  6:53 ` [PATCH v2 23/29] iommu/mediatek: Initialise bank HW for each a bank Yong Wu
2021-08-13  6:53 ` [PATCH v2 24/29] iommu/mediatek: Add bank_nr and bank_enable Yong Wu
2021-08-13  6:53 ` [PATCH v2 25/29] iommu/mediatek: Change the domid to iova_region_id Yong Wu
2021-08-13  6:53 ` Yong Wu [this message]
2021-08-13  6:53 ` [PATCH v2 27/29] iommu/mediatek: Initialise/Remove for multi bank dev Yong Wu
2021-08-13  6:53 ` [PATCH v2 28/29] iommu/mediatek: Backup/restore regsiters for multi banks Yong Wu
2021-08-13  6:53 ` [PATCH v2 29/29] iommu/mediatek: mt8195: Enable multi banks for infra iommu Yong Wu

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