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From: Bartosz Golaszewski <brgl@bgdev.pl>
To: Mark Brown <broonie@kernel.org>
Cc: Andrew Lunn <andrew@lunn.ch>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	devicetree <devicetree@vger.kernel.org>,
	Vladimir Oltean <vladimir.oltean@nxp.com>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Fabien Parent <fparent@baylibre.com>,
	Iyappan Subramanian <iyappan@os.amperecomputing.com>,
	Quan Nguyen <quan@os.amperecomputing.com>,
	Frank Rowand <frowand.list@gmail.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Russell King <linux@armlinux.org.uk>,
	Bartosz Golaszewski <bgolaszewski@baylibre.com>,
	Jakub Kicinski <kuba@kernel.org>,
	Yisen Zhuang <yisen.zhuang@huawei.com>,
	Vivien Didelot <vivien.didelot@gmail.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	Andrew Perepech <andrew.perepech@mediatek.com>,
	Stephane Le Provost <stephane.leprovost@mediatek.com>,
	Keyur Chudgar <keyur@os.amperecomputing.com>,
	Jassi Brar <jaswinder.singh@linaro.org>,
	Claudiu Manoil <claudiu.manoil@nxp.com>,
	Rob Herring <robh+dt@kernel.org>,
	"moderated list:ARM/Mediatek SoC..."
	<linux-mediatek@lists.infradead.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
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	Salil Mehta <salil.mehta@huawei.com>,
	netdev <netdev@vger.kernel.org>,
	Ilias Apalodimas <ilias.apalodimas@linaro.org>,
	Liam Girdwood <lgirdwood@gmail.com>,
	Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Pedro Tsai <pedro.tsai@mediatek.com>,
	"David S . Miller" <davem@davemloft.net>,
	Heiner Kallweit <hkallweit1@gmail.com>
Subject: Re: [PATCH 09/15] net: phy: delay PHY driver probe until PHY registration
Date: Wed, 24 Jun 2020 15:48:50 +0200	[thread overview]
Message-ID: <CAMRc=McBxJdujCyjQF3NA=bCWHF1dx8xJ1Nc2snmqukvJ_VyoQ@mail.gmail.com> (raw)
In-Reply-To: <20200624094302.GA5472@sirena.org.uk>

śr., 24 cze 2020 o 11:43 Mark Brown <broonie@kernel.org> napisał(a):
>
> On Tue, Jun 23, 2020 at 12:49:15PM -0700, Florian Fainelli wrote:
> > On 6/22/20 6:51 AM, Mark Brown wrote:
>
> > > If the bus includes power management for the devices on the bus the
> > > controller is generally responsible for that rather than the devices,
> > > the devices access this via facilities provided by the bus if needed.
> > > If the device is enumerated by firmware prior to being physically
> > > enumerable then the bus will generally instantiate the device model
> > > device and then arrange to wait for the physical device to appear and
> > > get joined up with the device model device, typically in such situations
> > > the physical device might appear and disappear dynamically at runtime
> > > based on what the driver is doing anyway.
>
> > In premise there is nothing that prevents the MDIO bus from taking care
> > of the regulators, resets, prior to probing the PHY driver, what is
> > complicated here is that we do need to issue a read of the actual PHY to
> > know its 32-bit unique identifier and match it with an appropriate
> > driver. The way that we have worked around this with if you do not wish
> > such a hardware access to be made, is to provide an Ethernet PHY node
> > compatible string that encodes that 32-bit OUI directly. In premise the
> > same challenges exist with PCI devices/endpoints as well as USB, would
> > they have reset or regulator typically attached to them.
>
> That all sounds very normal and is covered by both cases I describe?
>
> > > We could use a pre-probe stage in the device model for hotpluggable
> > > buses in embedded contexts where you might need to bring things out of
> > > reset or power them up before they'll appear on the bus for enumeration
> > > but buses have mostly handled that at their level.
>
> > That sounds like a better solution, are there any subsystems currently
> > implementing that, or would this be a generic Linux device driver model
> > addition that needs to be done?
>
> Like I say I'm suggesting doing something at the device model level.

I didn't expect to open such a can of worms...

This has evolved into several new concepts being proposed vs my
use-case which is relatively simple. The former will probably take
several months of development, reviews and discussions and it will
block supporting the phy supply on pumpkin boards upstream. I would
prefer not to redo what other MAC drivers do (phy-supply property on
the MAC node, controlling it from the MAC driver itself) if we've
already established it's wrong.

Is there any compromise we could reach to add support for a basic,
common use-case of a single regulator supplying a PHY that needs
enabling before reading its ID short-term (just like we currently
support a single reset or reset-gpios property for PHYs) and
introducing a whole new concept to the device model for more advanced
(but currently mostly hypothetical) cases long-term?

Bart

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  reply	other threads:[~2020-06-24 13:49 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20200622093744.13685-1-brgl@bgdev.pl>
     [not found] ` <20200622093744.13685-15-brgl@bgdev.pl>
     [not found]   ` <20200622132921.GI1551@shell.armlinux.org.uk>
     [not found]     ` <CAMRc=Me1r3Mzfg3-gTsGk4rEtvB=P9ESkn9q=c7z0Q=YQDsw2A@mail.gmail.com>
     [not found]       ` <20200623094252.GS1551@shell.armlinux.org.uk>
     [not found]         ` <CAMpxmJVP9db-4-AA4e1JkEfrajvJ4s0T6zo5+oFzpJHRBcuSsg@mail.gmail.com>
     [not found]           ` <20200623095646.GT1551@shell.armlinux.org.uk>
2020-06-23 16:27             ` [PATCH 14/15] net: phy: add PHY regulator support Bartosz Golaszewski
2020-06-24 16:57               ` Russell King - ARM Linux admin
2020-06-24 18:12                 ` Russell King - ARM Linux admin
     [not found] ` <20200622093744.13685-2-brgl@bgdev.pl>
2020-06-23 18:54   ` [PATCH 01/15] net: phy: arrange headers in mdio_bus.c alphabetically Florian Fainelli
     [not found] ` <20200622093744.13685-3-brgl@bgdev.pl>
2020-06-23 18:56   ` [PATCH 02/15] net: phy: arrange headers in mdio_device.c alphabetically Florian Fainelli
     [not found] ` <20200622093744.13685-4-brgl@bgdev.pl>
2020-06-23 18:57   ` [PATCH 03/15] net: phy: arrange headers in phy_device.c alphabetically Florian Fainelli
     [not found] ` <20200622093744.13685-5-brgl@bgdev.pl>
2020-06-23 18:59   ` [PATCH 04/15] net: mdio: add a forward declaration for reset_control to mdio.h Florian Fainelli
     [not found] ` <20200622093744.13685-6-brgl@bgdev.pl>
2020-06-23 19:14   ` [PATCH 05/15] net: phy: reset the PHY even if probe() is not implemented Florian Fainelli
2020-06-24 16:22     ` Bartosz Golaszewski
     [not found] ` <20200622093744.13685-7-brgl@bgdev.pl>
2020-06-23 19:16   ` [PATCH 06/15] net: phy: mdio: reset MDIO devices " Florian Fainelli
     [not found] ` <20200622093744.13685-13-brgl@bgdev.pl>
2020-06-23 19:39   ` [PATCH 12/15] dt-bindings: mdio: add phy-supply property to ethernet phy node Florian Fainelli
     [not found] ` <20200622093744.13685-10-brgl@bgdev.pl>
     [not found]   ` <20200622133940.GL338481@lunn.ch>
     [not found]     ` <20200622135106.GK4560@sirena.org.uk>
2020-06-23 19:49       ` [PATCH 09/15] net: phy: delay PHY driver probe until PHY registration Florian Fainelli
2020-06-24  9:43         ` Mark Brown
2020-06-24 13:48           ` Bartosz Golaszewski [this message]
2020-06-24 16:06             ` Florian Fainelli
2020-06-24 16:35               ` Bartosz Golaszewski
2020-06-24 16:50               ` Russell King - ARM Linux admin
2020-06-24 18:59                 ` Robin Murphy

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