From: Hauke Mehrtens <hauke@hauke-m.de>
To: James Hogan <james.hogan@imgtec.com>, Felix Fietkau <nbd@nbd.name>
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, john@phrozen.org
Subject: Re: [PATCH] MIPS: Lantiq: Fix cascaded IRQ setup
Date: Sun, 12 Feb 2017 00:50:48 +0100 [thread overview]
Message-ID: <073628a4-9c45-b3c3-6caa-c88bea138aa9@hauke-m.de> (raw)
In-Reply-To: <20170211231906.GI24226@jhogan-linux.le.imgtec.org>
On 02/12/2017 12:19 AM, James Hogan wrote:
> Hi Felix,
>
> On Thu, Jan 19, 2017 at 12:28:22PM +0100, Felix Fietkau wrote:
>> With the IRQ stack changes integrated, the XRX200 devices started
>> emitting a constant stream of kernel messages like this:
>>
>> [ 565.415310] Spurious IRQ: CAUSE=0x1100c300
>>
>> This appears to be caused by IP0 firing for some reason without being
>> handled. Fix this by setting up IP2-6 as a proper chained IRQ handler and
>> calling do_IRQ for all MIPS CPU interrupts.
>>
>> Cc: john@phrozen.org
>> Cc: stable@vger.kernel.org
>> Signed-off-by: Felix Fietkau <nbd@nbd.name>
>
> Is this still applicable after Matt's fix is applied?
> https://patchwork.linux-mips.org/patch/15110/
Hi,
I just tried it without Matt's and Felix's fix and I saw the problem,
then I applied Matt's fix and the problem was gone.
Hauke
next prev parent reply other threads:[~2017-02-11 23:50 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-19 11:28 [PATCH] MIPS: Lantiq: Fix cascaded IRQ setup Felix Fietkau
2017-01-19 11:54 ` John Crispin
2017-02-11 23:19 ` James Hogan
2017-02-11 23:19 ` James Hogan
2017-02-11 23:50 ` Hauke Mehrtens [this message]
2017-02-12 11:05 ` Felix Fietkau
2017-02-13 11:12 ` James Hogan
2017-02-13 11:12 ` James Hogan
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