From: Binbin Zhou <zhoubb@lemote.com>
To: Ralf Baechle <ralf@linux-mips.org>, James Hogan <james.hogan@imgtec.com>
Cc: "John Crispin" <john@phrozen.org>,
"Steven J . Hill" <Steven.Hill@imgtec.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Fuxin Zhang" <zhangfx@lemote.com>,
"Zhangjin Wu" <wuzhangjin@gmail.com>,
"Kelvin Cheung" <keguang.zhang@gmail.com>,
"Yang Ling" <gnaygnil@gmail.com>, 谢致邦 <Yeking@Red54.com>,
linux-mips@linux-mips.org, "Binbin Zhou" <zhoubb@lemote.com>,
"HuaCai Chen" <chenhc@lemote.com>
Subject: [PATCH v6 1/8] MIPS: Loongson: Merge PRID macro for Loongson-1A/1B/1C
Date: Thu, 30 Mar 2017 10:44:42 +0800 [thread overview]
Message-ID: <1490841889-13450-2-git-send-email-zhoubb@lemote.com> (raw)
In-Reply-To: <1490841889-13450-1-git-send-email-zhoubb@lemote.com>
As we all know, the Loongson-1 series CPUs(1A/1B/1C) share the same PRID macro.
so I rename them for more readable.
Signed-off-by: Binbin Zhou <zhoubb@lemote.com>
Signed-off-by: HuaCai Chen <chenhc@lemote.com>
---
arch/mips/include/asm/cpu.h | 3 +--
arch/mips/kernel/cpu-probe.c | 4 +++-
arch/mips/loongson32/common/setup.c | 2 +-
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 9a83724..76c0b56c3 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -239,8 +239,7 @@
#define PRID_REV_VR4181A 0x0070 /* Same as VR4122 */
#define PRID_REV_VR4130 0x0080
#define PRID_REV_34K_V1_0_2 0x0022
-#define PRID_REV_LOONGSON1B 0x0020
-#define PRID_REV_LOONGSON1C 0x0020 /* Same as Loongson-1B */
+#define PRID_REV_LOONGSON1ABC 0x0020
#define PRID_REV_LOONGSON2E 0x0002
#define PRID_REV_LOONGSON2F 0x0003
#define PRID_REV_LOONGSON3A_R1 0x0005
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 07718bb..657d65d 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1502,8 +1502,10 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
c->cputype = CPU_LOONGSON1;
switch (c->processor_id & PRID_REV_MASK) {
- case PRID_REV_LOONGSON1B:
+ case PRID_REV_LOONGSON1ABC:
+#ifdef CONFIG_CPU_LOONGSON1B
__cpu_name[cpu] = "Loongson 1B";
+#endif
break;
}
diff --git a/arch/mips/loongson32/common/setup.c b/arch/mips/loongson32/common/setup.c
index 1640744..c8e8b3e 100644
--- a/arch/mips/loongson32/common/setup.c
+++ b/arch/mips/loongson32/common/setup.c
@@ -21,7 +21,7 @@ const char *get_system_type(void)
unsigned int processor_id = (¤t_cpu_data)->processor_id;
switch (processor_id & PRID_REV_MASK) {
- case PRID_REV_LOONGSON1B:
+ case PRID_REV_LOONGSON1ABC:
#if defined(CONFIG_LOONGSON1_LS1B)
return "LOONGSON LS1B";
#elif defined(CONFIG_LOONGSON1_LS1C)
--
2.9.3
next prev parent reply other threads:[~2017-03-30 2:45 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-30 2:44 [PATCH v6 0/8] MIPS: Loongson: Add the Loongson-1A processor support Binbin Zhou
2017-03-30 2:44 ` Binbin Zhou [this message]
2017-03-30 9:50 ` [PATCH v6 1/8] MIPS: Loongson: Merge PRID macro for Loongson-1A/1B/1C Sergei Shtylyov
2017-04-24 14:52 ` Yang Ling
2017-03-30 2:44 ` [PATCH RESEND v6 2/8] MIPS: Loongson: Expand Loongson-1's register definition Binbin Zhou
2017-03-30 2:44 ` [PATCH v6 3/8] MIPS: Loongson: Add basic Loongson-1A CPU support Binbin Zhou
2017-03-30 2:44 ` [PATCH v6 4/8] MIPS: Loongson: Add Loongson-1A Kconfig options Binbin Zhou
2017-03-30 2:44 ` [PATCH v6 5/8] MIPS: Loongson: Add platform devices for Loongson-1A Binbin Zhou
2017-03-30 2:44 ` [PATCH v6 6/8] MIPS: Loongson: Add Loongson-1A board support Binbin Zhou
2017-03-30 2:44 ` [PATCH v6 7/8] clk: Loongson: Add Loongson-1A clock support Binbin Zhou
2017-03-30 2:44 ` [PATCH v6 8/8] MIPS: Loongson: Add Loongson-1A default config file Binbin Zhou
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