Re: MIPS Cache Coherency Issue

Re: MIPS Cache Coherency Issue

[Chris Packham]

On Mon, 2019-08-05 at 14:02 +0000, Tommy Jin wrote:
> Hi Chris,
> 
> My name is Tommy, from wave computing Co,Ltd, our team is working on
> the maintenance of the MIPS kernel.
> 
> You raised a MIPS cache coherency patch which can be found in the
> following links
> https://lore.kernel.org/linux-mips/20190528221255.22460-1-chris.packh
> am@alliedtelesis.co.nz/T/#u
> 
> With Paul's patch, It seems you still get "other bad behaviour", it
> doesn't work for you. Has this issue been resolved? 

In short no it hasn't been resolved. I haven't been able to spend much
time looking at the issue(s) so I haven't been able to tell if Paul's
patch uncovered pre-existing issues or caused new ones.

Unfortunately I probably won't get onto it any time soon. I was hoping
to get some of my other team members to pick up the issue but they're
all busy as well.

Re: [EXTERNAL]Re: MIPS Cache Coherency Issue

[Chris Packham]

On Tue, 2019-08-06 at 01:43 +0000, Tommy Jin wrote:
> Hi Chris,
> 
> If you're busy with other things, maybe I can give you a hand, so how
> can I replicate this issue locally?

Thanks for the offer but I'm not sure you'll be able to do much without
our specific hardware.

> 
> From your log, I can get the following information, please correct me
> if I miss anything.
> kernel version: 5.1.0

That's what I was using at the time. I imagine 5.2 or 5.3 would behave
the same.

> hardware platform: broadcom BMIPS4350

The specific SoC is BCM6818GR which I believe is the same core as the
BMIPS4355.

> I probably couldn't get a broadcom BMIPS4350, is there any simulator
> for this board(e.g. QEMU)?

Yeah it's a pretty old chip. I'm not aware of any QEMU support, but I
haven't looked.

> 
> Best regards,
> Tommy
> From: linux-mips-owner@vger.kernel.org <linux-mips-owner@vger.kernel.
> org> on behalf of Chris Packham <Chris.Packham@alliedtelesis.co.nz>
> Sent: Tuesday, August 6, 2019 5:13 AM
> To: Tommy Jin <tjin@wavecomp.com>
> Cc: linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>; linu
> x-mips@vger.kernel.org <linux-mips@vger.kernel.org>
> Subject: [EXTERNAL]Re: MIPS Cache Coherency Issue
>  
> On Mon, 2019-08-05 at 14:02 +0000, Tommy Jin wrote:
> > Hi Chris,
> > 
> > My name is Tommy, from wave computing Co,Ltd, our team is working
> on
> > the maintenance of the MIPS kernel.
> > 
> > You raised a MIPS cache coherency patch which can be found in the
> > following links
> > https://lore.kernel.org/linux-mips/20190528221255.22460-1-chris.pac
> kh
> > am@alliedtelesis.co.nz/T/#u
> > 
> > With Paul's patch, It seems you still get "other bad behaviour", it
> > doesn't work for you. Has this issue been resolved? 
> 
> In short no it hasn't been resolved. I haven't been able to spend
> much
> time looking at the issue(s) so I haven't been able to tell if Paul's
> patch uncovered pre-existing issues or caused new ones.
> 
> Unfortunately I probably won't get onto it any time soon. I was
> hoping
> to get some of my other team members to pick up the issue but they're
> all busy as well.