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From: Zhou Yanjie <zhouyanjie@zoho.com>
To: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, tglx@linutronix.de,
	paul.burton@mips.com, gregkh@linuxfoundation.org,
	jason@lakedaemon.net, syq@debian.org, marc.zyngier@arm.com,
	rfontana@redhat.com, armijn@tjaldur.nl, allison@lohutok.net,
	paul@crapouillou.net
Subject: [PATCH 1/5 v5] irqchip: ingenic: Drop redundant irq_suspend / irq_resume functions
Date: Wed,  2 Oct 2019 19:25:21 +0800	[thread overview]
Message-ID: <1570015525-27018-2-git-send-email-zhouyanjie@zoho.com> (raw)
In-Reply-To: <1570015525-27018-1-git-send-email-zhouyanjie@zoho.com>

From: Paul Cercueil <paul@crapouillou.net>

The same behaviour can be obtained by using the IRQCHIP_MASK_ON_SUSPEND
flag on the IRQ chip.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 drivers/irqchip/irq-ingenic.c   | 24 +-----------------------
 include/linux/irqchip/ingenic.h | 14 --------------
 2 files changed, 1 insertion(+), 37 deletions(-)
 delete mode 100644 include/linux/irqchip/ingenic.h

diff --git a/drivers/irqchip/irq-ingenic.c b/drivers/irqchip/irq-ingenic.c
index f126255..06fa810 100644
--- a/drivers/irqchip/irq-ingenic.c
+++ b/drivers/irqchip/irq-ingenic.c
@@ -10,7 +10,6 @@
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/irqchip.h>
-#include <linux/irqchip/ingenic.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/timex.h>
@@ -50,26 +49,6 @@ static irqreturn_t intc_cascade(int irq, void *data)
 	return IRQ_HANDLED;
 }
 
-static void intc_irq_set_mask(struct irq_chip_generic *gc, uint32_t mask)
-{
-	struct irq_chip_regs *regs = &gc->chip_types->regs;
-
-	writel(mask, gc->reg_base + regs->enable);
-	writel(~mask, gc->reg_base + regs->disable);
-}
-
-void ingenic_intc_irq_suspend(struct irq_data *data)
-{
-	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);
-	intc_irq_set_mask(gc, gc->wake_active);
-}
-
-void ingenic_intc_irq_resume(struct irq_data *data)
-{
-	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);
-	intc_irq_set_mask(gc, gc->mask_cache);
-}
-
 static struct irqaction intc_cascade_action = {
 	.handler = intc_cascade,
 	.name = "SoC intc cascade interrupt",
@@ -127,8 +106,7 @@ static int __init ingenic_intc_of_init(struct device_node *node,
 		ct->chip.irq_mask = irq_gc_mask_disable_reg;
 		ct->chip.irq_mask_ack = irq_gc_mask_disable_reg;
 		ct->chip.irq_set_wake = irq_gc_set_wake;
-		ct->chip.irq_suspend = ingenic_intc_irq_suspend;
-		ct->chip.irq_resume = ingenic_intc_irq_resume;
+		ct->chip.flags = IRQCHIP_MASK_ON_SUSPEND;
 
 		irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0,
 				       IRQ_NOPROBE | IRQ_LEVEL);
diff --git a/include/linux/irqchip/ingenic.h b/include/linux/irqchip/ingenic.h
deleted file mode 100644
index 1465588..0000000
--- a/include/linux/irqchip/ingenic.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- *  Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
- */
-
-#ifndef __LINUX_IRQCHIP_INGENIC_H__
-#define __LINUX_IRQCHIP_INGENIC_H__
-
-#include <linux/irq.h>
-
-extern void ingenic_intc_irq_suspend(struct irq_data *data);
-extern void ingenic_intc_irq_resume(struct irq_data *data);
-
-#endif
-- 
2.7.4



  reply	other threads:[~2019-10-02 11:26 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-26 15:38 Add Ingenic X1000 irqchip support Zhou Yanjie
2019-01-26 15:38 ` [PATCH 1/4] Irqchip: Ingenic: Change interrupt handling form cascade to chained_irq Zhou Yanjie
2019-01-27 10:21   ` Marc Zyngier
2019-01-27 14:49     ` Zhou Yanjie
2019-01-27 15:50   ` Add Ingenic X1000 irqchip support v2 Zhou Yanjie
2019-01-27 15:50     ` [PATCH v2 1/4] Irqchip: Ingenic: Change interrupt handling form cascade to chained_irq Zhou Yanjie
2019-01-27 15:50     ` [PATCH v2 2/4] Irqchip: Ingenic: Unify the function name prefix to "ingenic_intc_" Zhou Yanjie
2019-01-27 15:50     ` [PATCH v2 3/4] Irqchip: Ingenic: Add support for the X1000 Zhou Yanjie
2019-01-27 15:50     ` [PATCH v2 4/4] " Zhou Yanjie
2019-01-30 19:43       ` Rob Herring
2019-01-26 15:38 ` [PATCH 2/4] Irqchip: Ingenic: Unify the function name prefix to "ingenic_intc_" Zhou Yanjie
2019-01-26 15:38 ` [PATCH 3/4] Irqchip: Ingenic: Add support for the X1000 Zhou Yanjie
2019-01-27 10:14   ` Marc Zyngier
2019-01-27 14:51     ` Zhou Yanjie
2019-01-26 15:38 ` [PATCH 4/4] " Zhou Yanjie
2019-07-15 12:09 ` Add Ingenic JZ4760 and X1000 and X1500 irqchip support v3 Zhou Yanjie
2019-07-15 12:09   ` [PATCH v3 1/8] irqchip: Ingenic: Change interrupt handling form cascade to chained_irq Zhou Yanjie
2019-07-15 12:09   ` [PATCH v3 2/8] irqchip: Ingenic: Unify the function name prefix to "ingenic_intc_" Zhou Yanjie
2019-07-15 12:09   ` [PATCH v3 3/8] dt-bindings: interrupt-controller: Add JZ4760 and JZ4760B bindings Zhou Yanjie
2019-07-26 13:36     ` Marc Zyngier
2019-07-28 17:39       ` Zhou Yanjie
2019-07-15 12:09   ` [PATCH v3 4/8] irqchip: Ingenic: Add support for JZ4760 and JZ4760B Zhou Yanjie
2019-07-15 12:09   ` [PATCH v3 5/8] dt-bindings: interrupt-controller: Add X1000 and X1000E bindings Zhou Yanjie
2019-07-15 12:09   ` [PATCH v3 6/8] irqchip: Ingenic: Add support for X1000 and X1000E Zhou Yanjie
2019-07-15 12:09   ` [PATCH v3 7/8] dt-bindings: interrupt-controller: Add X1500 bindings Zhou Yanjie
2019-07-15 12:09   ` [PATCH v3 8/8] irqchip: Ingenic: Add support for X1500 Zhou Yanjie
2019-07-28 17:34 ` Add Ingenic JZ4760 and X1000 and X1500 irqchip support v4 Zhou Yanjie
2019-07-28 17:34   ` [PATCH 1/4 v4] irqchip: Ingenic: Change interrupt handling form cascade to chained_irq Zhou Yanjie
2019-07-29 17:19     ` Paul Cercueil
2019-07-30  6:41       ` Zhou Yanjie
2019-07-28 17:34   ` [PATCH 2/4 v4] irqchip: Ingenic: Unify the function name prefix to "ingenic_intc_" Zhou Yanjie
2019-07-28 17:34   ` [PATCH 3/4 v4] dt-bindings: interrupt-controller: Add new Ingenic Socs bindings Zhou Yanjie
2019-07-28 17:34   ` [PATCH 4/4 v4] irqchip: Ingenic: Add support for new Ingenic Socs Zhou Yanjie
2019-07-29 17:25     ` Paul Cercueil
2019-07-30  6:26       ` Zhou Yanjie
2019-10-02 11:25 ` Add process for more than one irq at the same time v5 Zhou Yanjie
2019-10-02 11:25   ` Zhou Yanjie [this message]
2019-10-06  0:13     ` [PATCH 1/5 v5] irqchip: ingenic: Drop redundant irq_suspend / irq_resume functions Paul Cercueil
2019-10-06  6:01       ` Zhou Yanjie
2019-10-02 11:25   ` [PATCH 2/5 v5] irqchip: ingenic: Error out if IRQ domain creation failed Zhou Yanjie
2019-10-02 11:25   ` [PATCH 3/5 v5] irqchip: ingenic: Get virq number from IRQ domain Zhou Yanjie
2019-10-02 11:25   ` [PATCH 4/5 v5] irqchip: ingenic: Alloc generic chips " Zhou Yanjie
2019-10-02 11:25   ` [PATCH 5/5 v5] irqchip: Ingenic: Add process for more than one irq at the same time Zhou Yanjie
2019-10-06  0:15     ` Paul Cercueil
2019-10-12  5:53 ` Add process for more than one irq at the same time v6 Zhou Yanjie
2019-10-12  5:53   ` [PATCH 1/5 v6] irqchip: ingenic: Drop redundant irq_suspend / irq_resume functions Zhou Yanjie
2019-11-11 10:49     ` Marc Zyngier
2019-10-12  5:53   ` [PATCH 2/5 v6] irqchip: ingenic: Error out if IRQ domain creation failed Zhou Yanjie
2019-10-12  5:53   ` [PATCH 3/5 v6] irqchip: ingenic: Get virq number from IRQ domain Zhou Yanjie
2019-10-12  5:53   ` [PATCH 4/5 v6] irqchip: ingenic: Alloc generic chips " Zhou Yanjie
2019-10-12  5:53   ` [PATCH 5/5 v6] irqchip: Ingenic: Add process for more than one irq at the same time Zhou Yanjie

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