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From: Paul Cercueil <paul@crapouillou.net>
To: Zhou Yanjie <zhouyanjie@zoho.com>
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
	tglx@linutronix.de, paul.burton@mips.com,
	gregkh@linuxfoundation.org, jason@lakedaemon.net, syq@debian.org,
	marc.zyngier@arm.com, rfontana@redhat.com, armijn@tjaldur.nl,
	allison@lohutok.net
Subject: Re: [PATCH 5/5 v5] irqchip: Ingenic: Add process for more than one irq at the same time.
Date: Sun, 06 Oct 2019 02:15:05 +0200
Message-ID: <1570320905.3.3@crapouillou.net> (raw)
In-Reply-To: <1570015525-27018-6-git-send-email-zhouyanjie@zoho.com>



Le mer., oct. 2, 2019 at 19:25, Zhou Yanjie <zhouyanjie@zoho.com> a 
écrit :
> Add process for the situation that more than one irq is coming to
> a single chip at the same time. The original code will only respond
> to the lowest setted bit in JZ_REG_INTC_PENDING, and then exit the
> interrupt dispatch function. After exiting the interrupt dispatch
> function, since the second interrupt has not yet responded, the
> interrupt dispatch function is again entered to process the second
> interrupt. This creates additional unnecessary overhead, and the
> more interrupts that occur at the same time, the more overhead is
> added. The improved method in this patch is to check whether there
> are still unresponsive interrupts after processing the lowest
> setted bit interrupt. If there are any, the processing will be
> processed according to the bit in JZ_REG_INTC_PENDING, and the
> interrupt dispatch function will be exited until all processing
> is completed.
> 
> Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>

Looks good to me.

Reviewed-by: Paul Cercueil <paul@crapouillou.net>


> ---
>  drivers/irqchip/irq-ingenic.c | 17 +++++++++++------
>  1 file changed, 11 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-ingenic.c 
> b/drivers/irqchip/irq-ingenic.c
> index 06ab3ad..c1be3d5 100644
> --- a/drivers/irqchip/irq-ingenic.c
> +++ b/drivers/irqchip/irq-ingenic.c
> @@ -1,7 +1,7 @@
>  // SPDX-License-Identifier: GPL-2.0-or-later
>  /*
>   *  Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
> - *  JZ4740 platform IRQ support
> + *  Ingenic XBurst platform IRQ support
>   */
> 
>  #include <linux/errno.h>
> @@ -37,18 +37,23 @@ static irqreturn_t intc_cascade(int irq, void 
> *data)
>  	struct ingenic_intc_data *intc = irq_get_handler_data(irq);
>  	struct irq_domain *domain = intc->domain;
>  	struct irq_chip_generic *gc;
> -	uint32_t irq_reg;
> +	uint32_t pending;
>  	unsigned i;
> 
>  	for (i = 0; i < intc->num_chips; i++) {
>  		gc = irq_get_domain_generic_chip(domain, i * 32);
> 
> -		irq_reg = irq_reg_readl(gc, JZ_REG_INTC_PENDING);
> -		if (!irq_reg)
> +		pending = irq_reg_readl(gc, JZ_REG_INTC_PENDING);
> +		if (!pending)
>  			continue;
> 
> -		irq = irq_find_mapping(domain, __fls(irq_reg) + (i * 32));
> -		generic_handle_irq(irq);
> +		while (pending) {
> +			int bit = __fls(pending);
> +
> +			irq = irq_find_mapping(domain, bit + (i * 32));
> +			generic_handle_irq(irq);
> +			pending &= ~BIT(bit);
> +		}
>  	}
> 
>  	return IRQ_HANDLED;
> --
> 2.7.4
> 
> 



  reply index

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-26 15:38 Add Ingenic X1000 irqchip support Zhou Yanjie
2019-01-26 15:38 ` [PATCH 1/4] Irqchip: Ingenic: Change interrupt handling form cascade to chained_irq Zhou Yanjie
2019-01-27 10:21   ` Marc Zyngier
2019-01-27 14:49     ` Zhou Yanjie
2019-01-27 15:50   ` Add Ingenic X1000 irqchip support v2 Zhou Yanjie
2019-01-27 15:50     ` [PATCH v2 1/4] Irqchip: Ingenic: Change interrupt handling form cascade to chained_irq Zhou Yanjie
2019-01-27 15:50     ` [PATCH v2 2/4] Irqchip: Ingenic: Unify the function name prefix to "ingenic_intc_" Zhou Yanjie
2019-01-27 15:50     ` [PATCH v2 3/4] Irqchip: Ingenic: Add support for the X1000 Zhou Yanjie
2019-01-27 15:50     ` [PATCH v2 4/4] " Zhou Yanjie
2019-01-30 19:43       ` Rob Herring
2019-01-26 15:38 ` [PATCH 2/4] Irqchip: Ingenic: Unify the function name prefix to "ingenic_intc_" Zhou Yanjie
2019-01-26 15:38 ` [PATCH 3/4] Irqchip: Ingenic: Add support for the X1000 Zhou Yanjie
2019-01-27 10:14   ` Marc Zyngier
2019-01-27 14:51     ` Zhou Yanjie
2019-01-26 15:38 ` [PATCH 4/4] " Zhou Yanjie
2019-07-15 12:09 ` Add Ingenic JZ4760 and X1000 and X1500 irqchip support v3 Zhou Yanjie
2019-07-15 12:09   ` [PATCH v3 1/8] irqchip: Ingenic: Change interrupt handling form cascade to chained_irq Zhou Yanjie
2019-07-15 12:09   ` [PATCH v3 2/8] irqchip: Ingenic: Unify the function name prefix to "ingenic_intc_" Zhou Yanjie
2019-07-15 12:09   ` [PATCH v3 3/8] dt-bindings: interrupt-controller: Add JZ4760 and JZ4760B bindings Zhou Yanjie
2019-07-26 13:36     ` Marc Zyngier
2019-07-28 17:39       ` Zhou Yanjie
2019-07-15 12:09   ` [PATCH v3 4/8] irqchip: Ingenic: Add support for JZ4760 and JZ4760B Zhou Yanjie
2019-07-15 12:09   ` [PATCH v3 5/8] dt-bindings: interrupt-controller: Add X1000 and X1000E bindings Zhou Yanjie
2019-07-15 12:09   ` [PATCH v3 6/8] irqchip: Ingenic: Add support for X1000 and X1000E Zhou Yanjie
2019-07-15 12:09   ` [PATCH v3 7/8] dt-bindings: interrupt-controller: Add X1500 bindings Zhou Yanjie
2019-07-15 12:09   ` [PATCH v3 8/8] irqchip: Ingenic: Add support for X1500 Zhou Yanjie
2019-07-28 17:34 ` Add Ingenic JZ4760 and X1000 and X1500 irqchip support v4 Zhou Yanjie
2019-07-28 17:34   ` [PATCH 1/4 v4] irqchip: Ingenic: Change interrupt handling form cascade to chained_irq Zhou Yanjie
2019-07-29 17:19     ` Paul Cercueil
2019-07-30  6:41       ` Zhou Yanjie
2019-07-28 17:34   ` [PATCH 2/4 v4] irqchip: Ingenic: Unify the function name prefix to "ingenic_intc_" Zhou Yanjie
2019-07-28 17:34   ` [PATCH 3/4 v4] dt-bindings: interrupt-controller: Add new Ingenic Socs bindings Zhou Yanjie
2019-07-28 17:34   ` [PATCH 4/4 v4] irqchip: Ingenic: Add support for new Ingenic Socs Zhou Yanjie
2019-07-29 17:25     ` Paul Cercueil
2019-07-30  6:26       ` Zhou Yanjie
2019-10-02 11:25 ` Add process for more than one irq at the same time v5 Zhou Yanjie
2019-10-02 11:25   ` [PATCH 1/5 v5] irqchip: ingenic: Drop redundant irq_suspend / irq_resume functions Zhou Yanjie
2019-10-06  0:13     ` Paul Cercueil
2019-10-06  6:01       ` Zhou Yanjie
2019-10-02 11:25   ` [PATCH 2/5 v5] irqchip: ingenic: Error out if IRQ domain creation failed Zhou Yanjie
2019-10-02 11:25   ` [PATCH 3/5 v5] irqchip: ingenic: Get virq number from IRQ domain Zhou Yanjie
2019-10-02 11:25   ` [PATCH 4/5 v5] irqchip: ingenic: Alloc generic chips " Zhou Yanjie
2019-10-02 11:25   ` [PATCH 5/5 v5] irqchip: Ingenic: Add process for more than one irq at the same time Zhou Yanjie
2019-10-06  0:15     ` Paul Cercueil [this message]
2019-10-12  5:53 ` Add process for more than one irq at the same time v6 Zhou Yanjie
2019-10-12  5:53   ` [PATCH 1/5 v6] irqchip: ingenic: Drop redundant irq_suspend / irq_resume functions Zhou Yanjie
2019-11-11 10:49     ` Marc Zyngier
2019-10-12  5:53   ` [PATCH 2/5 v6] irqchip: ingenic: Error out if IRQ domain creation failed Zhou Yanjie
2019-10-12  5:53   ` [PATCH 3/5 v6] irqchip: ingenic: Get virq number from IRQ domain Zhou Yanjie
2019-10-12  5:53   ` [PATCH 4/5 v6] irqchip: ingenic: Alloc generic chips " Zhou Yanjie
2019-10-12  5:53   ` [PATCH 5/5 v6] irqchip: Ingenic: Add process for more than one irq at the same time Zhou Yanjie

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