From: Zhou Yanjie <zhouyanjie@zoho.com>
To: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, ralf@linux-mips.org,
paulburton@kernel.org, jhogan@kernel.org, paul@crapouillou.net,
jiaxun.yang@flygoat.com, gregkh@linuxfoundation.org,
malat@debian.org, tglx@linutronix.de, chenhc@lemote.com
Subject: [PATCH 2/2 v3] MIPS: Ingenic: Disable abandoned HPTLB function.
Date: Tue, 19 Nov 2019 22:28:47 +0800 [thread overview]
Message-ID: <1574173727-123321-3-git-send-email-zhouyanjie@zoho.com> (raw)
In-Reply-To: <1574173727-123321-1-git-send-email-zhouyanjie@zoho.com>
JZ4760/JZ4770/JZ4775/X1000/X1500 has an abandoned huge page tlb,
this mode is not compatible with the MIPS standard, it will cause
tlbmiss and into an infinite loop (line 21 in the tlb-funcs.S)
when starting the init process. write 0xa9000000 to cp0 register 5
sel 4 to disable this function to prevent getting stuck. Confirmed
by Ingenic, this operation will not adversely affect processors
without HPTLB function.
Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
---
arch/mips/include/asm/mipsregs.h | 6 ++++++
arch/mips/kernel/cpu-probe.c | 21 +++++++++++++++++++--
2 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index bdbdc19..0d5a309 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -689,6 +689,9 @@
#define MIPS_CONF7_IAR (_ULCAST_(1) << 10)
#define MIPS_CONF7_AR (_ULCAST_(1) << 16)
+/* Ingenic HPTLB off bits */
+#define XBURST_PAGECTRL_HPTLB_DIS 0xa9000000
+
/* Ingenic Config7 bits */
#define MIPS_CONF7_BTB_LOOP_EN (_ULCAST_(1) << 4)
@@ -1971,6 +1974,9 @@ do { \
#define read_c0_brcm_sleepcount() __read_32bit_c0_register($22, 7)
#define write_c0_brcm_sleepcount(val) __write_32bit_c0_register($22, 7, val)
+/* Ingenic page ctrl register */
+#define write_c0_page_ctrl(val) __write_32bit_c0_register($5, 4, val)
+
/*
* Macros to access the guest system control coprocessor
*/
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 7a0e33c..3b5f4fb 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1965,13 +1965,30 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu)
break;
}
+ switch (c->processor_id & PRID_COMP_MASK) {
+ /*
+ * The config0 register in the XBurst CPUs with a processor ID of
+ * PRID_COMP_INGENIC_D1 has an abandoned huge page tlb mode, this
+ * mode is not compatible with the MIPS standard, it will cause
+ * tlbmiss and into an infinite loop (line 21 in the tlb-funcs.S)
+ * when starting the init process. After chip reset, the default
+ * is HPTLB mode, Write 0xa9000000 to cp0 register 5 sel 4 to
+ * switch back to VTLB mode to prevent getting stuck.
+ */
+ case PRID_COMP_INGENIC_D1:
+ write_c0_page_ctrl(XBURST_PAGECTRL_HPTLB_DIS);
+ break;
/*
- * The config0 register in the Xburst CPUs with a processor ID of
+ * The config0 register in the XBurst CPUs with a processor ID of
* PRID_COMP_INGENIC_D0 report themselves as MIPS32r2 compatible,
* but they don't actually support this ISA.
*/
- if ((c->processor_id & PRID_COMP_MASK) == PRID_COMP_INGENIC_D0)
+ case PRID_COMP_INGENIC_D0:
c->isa_level &= ~MIPS_CPU_ISA_M32R2;
+ break;
+ default:
+ break;
+ }
}
static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu)
--
2.7.4
next prev parent reply other threads:[~2019-11-19 14:30 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-24 9:28 MIPS: Ingenic: Disable abandoned HPTLB function Zhou Yanjie
2019-10-24 9:29 ` [PATCH 1/2] MIPS: Rename JZRISC to XBurst Zhou Yanjie
2019-10-24 9:29 ` [PATCH 2/2] MIPS: Ingenic: Disable abandoned HPTLB function Zhou Yanjie
2019-11-15 21:37 ` Paul Burton
2019-11-16 10:11 ` Zhou Yanjie
2019-11-17 11:49 ` Paul Cercueil
2019-11-17 16:36 ` Zhou Yanjie
2019-11-18 4:17 ` Zhou Yanjie
2019-11-15 18:49 ` Paul Cercueil
2019-11-16 17:23 ` MIPS: Ingenic: Disable abandoned HPTLB function v2 Zhou Yanjie
2019-11-16 17:23 ` [PATCH 1/2 v2] MIPS: Rename JZRISC to XBurst Zhou Yanjie
2019-11-16 17:23 ` [PATCH 2/2 v2] MIPS: Ingenic: Disable abandoned HPTLB function Zhou Yanjie
2019-11-19 14:28 ` MIPS: Ingenic: Disable abandoned HPTLB function v3 Zhou Yanjie
2019-11-19 14:28 ` [PATCH 1/2 v3] MIPS: Rename JZRISC to XBurst Zhou Yanjie
2019-11-19 14:28 ` Zhou Yanjie [this message]
2019-11-20 11:45 ` [PATCH 2/2 v3] MIPS: Ingenic: Disable abandoned HPTLB function Paul Cercueil
2019-11-22 22:06 ` Paul Burton
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