From: Zhou Yanjie <zhouyanjie@zoho.com>
To: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, paulburton@kernel.org,
paul.burton@mips.com, linus.walleij@linaro.org,
paul@crapouillou.net, robh+dt@kernel.org, mark.rutland@arm.com,
syq@debian.org
Subject: [PATCH v3 3/4] dt-bindings: pinctrl: Add bindings for Ingenic X1830.
Date: Thu, 21 Nov 2019 14:19:42 +0800 [thread overview]
Message-ID: <1574317183-126374-4-git-send-email-zhouyanjie@zoho.com> (raw)
In-Reply-To: <1574317183-126374-1-git-send-email-zhouyanjie@zoho.com>
Add the pinctrl bindings for the X1830 Soc from Ingenic.
Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
---
Notes:
v2:
New patch.
v2->v3:
No change.
Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
index 0014d98..d9b2100 100644
--- a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
@@ -10,9 +10,9 @@ GPIO port configuration registers and it is typical to refer to pins using the
naming scheme "PxN" where x is a character identifying the GPIO port with
which the pin is associated and N is an integer from 0 to 31 identifying the
pin within that GPIO port. For example PA0 is the first pin in GPIO port A, and
-PB31 is the last pin in GPIO port B. The jz4740 and the x1000 contains 4 GPIO
-ports, PA to PD, for a total of 128 pins. The jz4760, the jz4770 and the jz4780
-contains 6 GPIO ports, PA to PF, for a total of 192 pins.
+PB31 is the last pin in GPIO port B. The jz4740, the x1000 and the x1830
+contains 4 GPIO ports, PA to PD, for a total of 128 pins. The jz4760, the
+jz4770 and the jz4780 contains 6 GPIO ports, PA to PF, for a total of 192 pins.
Required properties:
@@ -28,6 +28,7 @@ Required properties:
- "ingenic,x1000-pinctrl"
- "ingenic,x1000e-pinctrl"
- "ingenic,x1500-pinctrl"
+ - "ingenic,x1830-pinctrl"
- reg: Address range of the pinctrl registers.
@@ -40,6 +41,7 @@ Required properties for sub-nodes (GPIO chips):
- "ingenic,jz4770-gpio"
- "ingenic,jz4780-gpio"
- "ingenic,x1000-gpio"
+ - "ingenic,x1830-gpio"
- reg: The GPIO bank number.
- interrupt-controller: Marks the device node as an interrupt controller.
- interrupts: Interrupt specifier for the controllers interrupt.
--
2.7.4
next prev parent reply other threads:[~2019-11-21 6:21 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-21 6:19 Fix bugs in X1000/X1500 and add X1830 pinctrl driver v3 Zhou Yanjie
2019-11-21 6:19 ` [PATCH v3 1/4] pinctrl: Ingenic: Fix bugs in X1000 and X1500 Zhou Yanjie
2019-11-21 6:19 ` [PATCH v3 2/4] pinctrl: Ingenic: Add missing parts for " Zhou Yanjie
2019-11-21 6:19 ` Zhou Yanjie [this message]
2019-11-23 0:47 ` [PATCH v3 3/4] dt-bindings: pinctrl: Add bindings for Ingenic X1830 Rob Herring
2019-11-21 6:19 ` [PATCH v3 4/4] pinctrl: Ingenic: Add pinctrl driver for X1830 Zhou Yanjie
2019-11-22 18:43 ` Paul Cercueil
2019-11-23 2:45 ` Zhou Yanjie
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