From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailapp01.imgtec.com ([195.59.15.196]:1380 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S23992126AbdCaMz6VQspQ (ORCPT ); Fri, 31 Mar 2017 14:55:58 +0200 Subject: Re: [PATCH 0/2] Fix v4.11 malta_defconfig regressions References: <1490958332-31094-1-git-send-email-matt.redfearn@imgtec.com> From: Matt Redfearn Message-ID: Date: Fri, 31 Mar 2017 13:55:51 +0100 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit Return-Path: Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-subscribe: List-owner: List-post: List-archive: To: Marc Zyngier , Ralf Baechle , James Hogan Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, Thomas Gleixner , Jason Cooper , Paul Burton Message-ID: <20170331125551.CWiOs2YWJdhnu3htn-yI4qVFWZ0xJePesddbL4vQv8U@z> Hi Marc, On 31/03/17 13:04, Marc Zyngier wrote: > Hi Matt, > > On 31/03/17 12:05, Matt Redfearn wrote: >> Since v4.11-rc1, 3 regressions have been observed on the Malta platform, >> using malta_defconfig. which prevent it booting. These patches fix 2 of >> them. The third one is that malta_defconfig, which uses SMP-MT, no >> longer sets up its IPIs correctly resulting is a string of messages >> like: >> >> irq 23: nobody cared (try booting with the "irqpoll" option) >> CPU: 1 PID: 0 Comm: swapper/1 Tainted: G W 4.11.0-rc4 #421 >> Stack : 00000000 00000000 00000000 00000000 807cdff2 00000047 00000000 0000003d >> 80741327 8f093194 806c191c 00000000 00000001 807c9acc 80756078 807d0000 >> 807cdbe4 80177c78 00000003 0000003c 00000006 80177a04 806c70a8 8f02be8c >> 00000006 801b4c8c 00000000 00000000 ffffffff 00000000 8f02be8c 80740000 >> 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 >> ... >> Call Trace: >> [<8010c6c0>] show_stack+0x88/0xa4 >> [<80380fb8>] dump_stack+0x88/0xd0 >> [<8017cf64>] __report_bad_irq+0x48/0x108 >> [<8017d2d4>] note_interrupt+0x1c0/0x2fc >> [<80179ed4>] handle_irq_event_percpu+0x4c/0x64 >> [<8017eafc>] handle_percpu_irq+0x88/0xb8 >> [<801791c0>] generic_handle_irq+0x40/0x58 >> [<80108664>] do_IRQ+0x18/0x24 >> [<803b83fc>] plat_irq_dispatch+0x54/0xa8 >> handlers: >> Disabling IRQ #23 >> >> This regression is fixed by Paul Burtons series "MIPS/irqchip: Use IPI >> IRQ domains for CPU interrupt controller IPIs", but it is a large change >> for this stage in the cycle so I don't know how best to proceed with >> that one. >> >> >> >> Matt Redfearn (2): >> MIPS: Malta: Fix i8259 irqchip setup >> irqchip/mips-gic: Fix Local compare interrupt >> >> arch/mips/mti-malta/malta-int.c | 13 +++++++++++++ >> drivers/irqchip/irq-mips-gic.c | 4 ++++ >> 2 files changed, 17 insertions(+) >> > I can take the GIC patch through the irq tree if that's convenient (I > was about to send a PR anyway). Just let me know. > > Thanks, > > M. Yes that would be great, please. Ralf has just acked it. Thanks, Matt