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From: Paul Burton <paul.burton@imgtec.com>
To: Thomas Gleixner <tglx@linutronix.de>, Ralf Baechle <ralf@linux-mips.org>
Cc: <dianders@chromium.org>, James Hogan <james.hogan@imgtec.com>,
	Brian Norris <briannorris@chromium.org>,
	Jason Cooper <jason@lakedaemon.net>, <jeffy.chen@rock-chips.com>,
	Marc Zyngier <marc.zyngier@arm.com>,
	<linux-kernel@vger.kernel.org>, <linux-mips@linux-mips.org>,
	<tfiga@chromium.org>, Paul Burton <paul.burton@imgtec.com>
Subject: [RFC PATCH v1 9/9] irqchip: mips-gic: Remove gic_all_vpes_local_irq_controller
Date: Thu, 7 Sep 2017 16:25:42 -0700
Message-ID: <20170907232542.20589-10-paul.burton@imgtec.com> (raw)
In-Reply-To: <20170907232542.20589-1-paul.burton@imgtec.com>

The gic_all_vpes_local_irq_controller irq_chip in the MIPS GIC driver is
a hack which was necessary due to other drivers & MIPS arch code not
using the percpu interrupt APIs to configure & control interrupts which
are really percpu.

This is no longer a problem - other drivers & arch code support using
the percpu interrupt APIs so we can now remove the
gic_all_vpes_local_irq_controller hack.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org

---

 drivers/irqchip/irq-mips-gic.c | 69 +++++-------------------------------------
 1 file changed, 7 insertions(+), 62 deletions(-)

diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 40159ac12ac8..99dda0618599 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -337,40 +337,6 @@ static struct irq_chip gic_local_irq_controller = {
 	.irq_unmask		=	gic_unmask_local_irq,
 };
 
-static void gic_mask_local_irq_all_vpes(struct irq_data *d)
-{
-	int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq);
-	int i;
-	unsigned long flags;
-
-	spin_lock_irqsave(&gic_lock, flags);
-	for (i = 0; i < gic_vpes; i++) {
-		write_gic_vl_other(mips_cm_vp_id(i));
-		write_gic_vo_rmask(BIT(intr));
-	}
-	spin_unlock_irqrestore(&gic_lock, flags);
-}
-
-static void gic_unmask_local_irq_all_vpes(struct irq_data *d)
-{
-	int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq);
-	int i;
-	unsigned long flags;
-
-	spin_lock_irqsave(&gic_lock, flags);
-	for (i = 0; i < gic_vpes; i++) {
-		write_gic_vl_other(mips_cm_vp_id(i));
-		write_gic_vo_smask(BIT(intr));
-	}
-	spin_unlock_irqrestore(&gic_lock, flags);
-}
-
-static struct irq_chip gic_all_vpes_local_irq_controller = {
-	.name			=	"MIPS GIC Local",
-	.irq_mask		=	gic_mask_local_irq_all_vpes,
-	.irq_unmask		=	gic_unmask_local_irq_all_vpes,
-};
-
 static void __gic_irq_dispatch(void)
 {
 	gic_handle_local_int(false);
@@ -471,35 +437,14 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int virq,
 		return gic_shared_irq_domain_map(d, virq, hwirq, 0);
 	}
 
-	switch (GIC_HWIRQ_TO_LOCAL(hwirq)) {
-	case GIC_LOCAL_INT_TIMER:
-	case GIC_LOCAL_INT_PERFCTR:
-	case GIC_LOCAL_INT_FDC:
-		/*
-		 * HACK: These are all really percpu interrupts, but
-		 * the rest of the MIPS kernel code does not use the
-		 * percpu IRQ API for them.
-		 */
-		err = irq_domain_set_hwirq_and_chip(d, virq, hwirq,
-						    &gic_all_vpes_local_irq_controller,
-						    NULL);
-		if (err)
-			return err;
-
-		irq_set_handler(virq, handle_percpu_irq);
-		break;
+	err = irq_domain_set_hwirq_and_chip(d, virq, hwirq,
+					    &gic_local_irq_controller,
+					    NULL);
+	if (err)
+		return err;
 
-	default:
-		err = irq_domain_set_hwirq_and_chip(d, virq, hwirq,
-						    &gic_local_irq_controller,
-						    NULL);
-		if (err)
-			return err;
-
-		irq_set_handler(virq, handle_percpu_devid_irq);
-		irq_set_percpu_devid(virq);
-		break;
-	}
+	irq_set_handler(virq, handle_percpu_devid_irq);
+	irq_set_percpu_devid(virq);
 
 	return gic_local_irq_domain_map(d, virq, hwirq);
 }
-- 
2.14.1

      parent reply index

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1682867.tATABVWsV9@np-p-burton>
2017-09-07 23:25 ` [RFC PATCH v1 0/9] Support shared percpu interrupts; clean up MIPS hacks Paul Burton
2017-09-07 23:25   ` [RFC PATCH v1 1/9] genirq: Allow shared interrupt users to opt into IRQ_NOAUTOEN Paul Burton
2017-09-07 23:25   ` [RFC PATCH v1 2/9] genirq: Support shared per_cpu_devid interrupts Paul Burton
2017-09-25 21:06     ` Thomas Gleixner
2017-09-26 12:00       ` Thomas Gleixner
2017-10-19 14:08         ` Thomas Gleixner
2017-09-07 23:25   ` [RFC PATCH v1 3/9] genirq: Introduce irq_is_percpu_devid() Paul Burton
2017-09-07 23:25   ` [RFC PATCH v1 4/9] MIPS: Remove perf_irq interrupt sharing fallback Paul Burton
2017-09-07 23:25   ` [RFC PATCH v1 5/9] MIPS: Remove perf_irq Paul Burton
2017-09-07 23:25   ` [RFC PATCH v1 6/9] MIPS: perf: percpu_devid interrupt support Paul Burton
2017-10-19 14:12     ` Thomas Gleixner
2017-09-07 23:25   ` [RFC PATCH v1 7/9] MIPS: cevt-r4k: " Paul Burton
2017-09-07 23:25   ` [RFC PATCH v1 8/9] irqchip: mips-cpu: Set timer, FDC & perf interrupts percpu_devid Paul Burton
2017-09-07 23:25   ` Paul Burton [this message]

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