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Wed, 7 Nov 2018 23:05:08 +0000 Received: from MWHSPR00MB117.namprd22.prod.outlook.com ([fe80::b95a:a3f9:be06:b045]) by MWHSPR00MB117.namprd22.prod.outlook.com ([fe80::b95a:a3f9:be06:b045%2]) with mapi id 15.20.1294.034; Wed, 7 Nov 2018 23:05:08 +0000 From: Paul Burton To: "linux-mips@linux-mips.org" CC: Paul Burton Subject: [PATCH] MIPS: Remove GCC_IMM_ASM & GCC_REG_ACCUM macros Thread-Topic: [PATCH] MIPS: Remove GCC_IMM_ASM & GCC_REG_ACCUM macros Thread-Index: AQHUdu5THmlJicKOe0em0G//s/og1A== Date: Wed, 7 Nov 2018 23:05:07 +0000 Message-ID: <20181107230454.3232-1-paul.burton@mips.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MWHPR19CA0051.namprd19.prod.outlook.com (2603:10b6:300:94::13) To MWHSPR00MB117.namprd22.prod.outlook.com (2603:10b6:300:10c::23) authentication-results: spf=none (sender IP is ) smtp.mailfrom=pburton@wavecomp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [4.16.204.77] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;MWHPR2201MB1119;6:zT3Np1kbQfg16+Jtfwk8p6w6jMlispCvkawWiAgfSYpI46QllWLiUAXmAVj1cKmPiBzAl1E6+e7OCmyqGwrIZKODlg+XdhVosQvPPJ/NveaEX4A4eA1lIbnezPdJOWLu1fE5Rgr33GQtJRz+XdD5OuOjA7oDiMAw8n6YgfEKYR6VhvsCfSCtXEl+jqB2bXFtMAGaVtmPnls3UDcKbnAa97946C43jr9WwpktmtPXKqxhi5AZmMTjuozq1ZcE9n3kmgqs5zsWAZHycTjl7nK4XAd9+QmiNhzSYB3Zchu/UbCg5Dn4m0+3f1JOGOTL/ff3vr5CwfOmEFfRYepX8RrrB7ry9jPFdVH6emldVyAybSPogTDBQPFz2kZjXyxqwAJjvDpnkBmQv9MFsGMfUQuSAiWvNt41+Ab30eRA4tvkDKdc7yPAQOUXfXeF9vK//p/fUGEBsMlucpsyoisMnUGXtA==;5:Z0WtyOn1/fk8rigApGzz3e4mE7yScYyRVUPxtsshMyPFAGANoqcX1GNN7/XG0JfwWg17WAX+Va3uFVnuaWz0CUhXzJVxeMPhy9WCiIfUp+BFPyY4MIfwI45nf+1dHNyGvMsUBdI1Z4PQwHBBv7Vg7kTU/mTuTQIPrO+YNOjc4Sg=;7:b/nOBdawh3alYwndcLO8c6qAVtiykAlomEnkrKSnSG/8ZQ0f0ElX1deX7WfUj0xcVDEFSXUB4rSOuBLx55ll4kwkl+nTNrg+TO3gOd8T9uDBot3YBNgTGn0uawCAN3h0H1SVZ8wkTIDB9kolo9wZ2Q== x-ms-office365-filtering-correlation-id: 7c362edb-4844-460c-709d-08d645057576 x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(7021145)(8989299)(5600074)(711020)(4534185)(7022145)(4603075)(4627221)(201702281549075)(8990200)(7048125)(7024125)(7027125)(7023125)(2017052603328)(7153060)(7193020);SRVR:MWHPR2201MB1119; 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received-spf: None (protection.outlook.com: wavecomp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: PbSqXNtp5f6lADv0eRX7g/bcJ/pKvx0BHaK3xIXAgN9S/p5CzyWS9OK3dok/QoJwYyODFoQBlFS02yZ7CPvOHiWzjmKh1bkiku3zLQnkeoKuTR9WgaCQh/TfZFrEe4cobaRIUTUdTl7befXUBNI6bNyMWv0Rq4tvb/VVf+q+WiX6KJuqQp7Pq/Bz0jbqmnrHUTYSAhH3BSnYo5duu5DVsd45J7MlUfKik4S8lH66QTjwVQiBI9Y6qiWM98hOk2KJ9nnogLjfolilkAG1NpXGvSIroafgBAsskFNjSAQMowFc6o2kjLo62VclnqNLUlRb5ij6bK0PBp/TtzjaCMgzYeThsSTUQ8KAkDgJv4ZaLZ8= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-OriginatorOrg: mips.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7c362edb-4844-460c-709d-08d645057576 X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Nov 2018 23:05:08.0564 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 463607d3-1db3-40a0-8a29-970c56230104 X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR2201MB1119 Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 67135 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: paul.burton@mips.com Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips asm/compiler.h defined GCC_IMM_ASM & GCC_REG_ACCUM macros, both of which are defined differently for GCC pre-3.4 or GCC 3.4 & higher. We only support building with GCC 4.6 & higher since commit cafa0010cd51 ("Raise the minimum required gcc version to 4.6"), which makes the pre-3.4 definition dead code. Rather than leave the macro definitions around, inline the GCC 3.4 & higher definitions into the single file that uses them & remove the macros entirely. Signed-off-by: Paul Burton --- arch/mips/include/asm/compiler.h | 8 -------- arch/mips/kernel/cpu-bugs64.c | 4 ++-- 2 files changed, 2 insertions(+), 10 deletions(-) diff --git a/arch/mips/include/asm/compiler.h b/arch/mips/include/asm/compiler.h index cc2eb1b06050..9196fca4335d 100644 --- a/arch/mips/include/asm/compiler.h +++ b/arch/mips/include/asm/compiler.h @@ -43,14 +43,6 @@ #undef barrier_before_unreachable #define barrier_before_unreachable() asm volatile(".insn") -#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) -#define GCC_IMM_ASM() "n" -#define GCC_REG_ACCUM "$0" -#else -#define GCC_IMM_ASM() "rn" -#define GCC_REG_ACCUM "accum" -#endif - #ifdef CONFIG_CPU_MIPSR6 /* All MIPS R6 toolchains support the ZC constrain */ #define GCC_OFF_SMALL_ASM() "ZC" diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c index c9e8622b5a16..bada74af7641 100644 --- a/arch/mips/kernel/cpu-bugs64.c +++ b/arch/mips/kernel/cpu-bugs64.c @@ -39,7 +39,7 @@ static inline void align_mod(const int align, const int mod) ".endr\n\t" ".set pop" : - : GCC_IMM_ASM() (align), GCC_IMM_ASM() (mod)); + : "n"(align), "n"(mod)); } static inline void mult_sh_align_mod(long *v1, long *v2, long *w, @@ -92,7 +92,7 @@ static inline void mult_sh_align_mod(long *v1, long *v2, long *w, ".set pop" : "=&r" (lv1), "=r" (lw) : "r" (m1), "r" (m2), "r" (s), "I" (0) - : "hi", "lo", GCC_REG_ACCUM); + : "hi", "lo", "$0"); /* We have to use single integers for m1 and m2 and a double * one for p to be sure the mulsidi3 gcc's RTL multiplication * instruction has the workaround applied. Older versions of -- 2.19.1