From: YunQiang Su <syq@debian.org>
To: pburton@wavecomp.com, linux-mips@vger.kernel.org
Cc: YunQiang Su <ysu@wavecomp.com>
Subject: [PATCH] Disable MSI also when pcie-octeon.pcie_disable on
Date: Mon, 7 Jan 2019 10:55:42 +0800 [thread overview]
Message-ID: <20190107025542.2273-1-syq@debian.org> (raw)
From: YunQiang Su <ysu@wavecomp.com>
Octeon has an boot-time option to disable pcie.
Since MSI depends on PCI-E, we should also disable MSI also with
this options is on.
Signed-off-by: YunQiang Su <ysu@wavecomp.com>
---
arch/mips/pci/msi-octeon.c | 9 +++++++--
arch/mips/pci/pcie-octeon.c | 5 +++++
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c
index 2a5bb849b..ed6b2f93d 100644
--- a/arch/mips/pci/msi-octeon.c
+++ b/arch/mips/pci/msi-octeon.c
@@ -45,6 +45,11 @@ static DEFINE_SPINLOCK(msi_free_irq_bitmask_lock);
*/
static int msi_irq_size;
+/*
+ * whether pcie is disabled?
+ */
+extern int octeon_pcie_disabled(void);
+
/**
* Called when a driver request MSI interrupts instead of the
* legacy INT A-D. This routine will allocate multiple interrupts
@@ -395,7 +400,7 @@ int __init octeon_msi_initialize(void)
for (irq = OCTEON_IRQ_MSI_BIT0; irq <= OCTEON_IRQ_MSI_LAST; irq++)
irq_set_chip_and_handler(irq, msi, handle_simple_irq);
- if (octeon_has_feature(OCTEON_FEATURE_PCIE)) {
+ if (octeon_has_feature(OCTEON_FEATURE_PCIE) && !octeon_pcie_disabled()) {
if (request_irq(OCTEON_IRQ_PCI_MSI0, octeon_msi_interrupt0,
0, "MSI[0:63]", octeon_msi_interrupt0))
panic("request_irq(OCTEON_IRQ_PCI_MSI0) failed");
@@ -413,7 +418,7 @@ int __init octeon_msi_initialize(void)
panic("request_irq(OCTEON_IRQ_PCI_MSI3) failed");
msi_irq_size = 256;
- } else if (octeon_is_pci_host()) {
+ } else if (octeon_is_pci_host() && !octeon_pcie_disabled()) {
if (request_irq(OCTEON_IRQ_PCI_MSI0, octeon_msi_interrupt0,
0, "MSI[0:15]", octeon_msi_interrupt0))
panic("request_irq(OCTEON_IRQ_PCI_MSI0) failed");
diff --git a/arch/mips/pci/pcie-octeon.c b/arch/mips/pci/pcie-octeon.c
index d919a0d81..16d90290a 100644
--- a/arch/mips/pci/pcie-octeon.c
+++ b/arch/mips/pci/pcie-octeon.c
@@ -34,6 +34,11 @@
static int pcie_disable;
module_param(pcie_disable, int, S_IRUGO);
+int octeon_pcie_disabled(void){
+ return pcie_disable;
+}
+EXPORT_SYMBOL(octeon_pcie_disabled);
+
static int enable_pcie_14459_war;
static int enable_pcie_bus_num_war[2];
--
2.20.1
next reply other threads:[~2019-01-07 2:55 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-07 2:55 YunQiang Su [this message]
2019-01-07 18:15 ` [PATCH] Disable MSI also when pcie-octeon.pcie_disable on Aaro Koskinen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190107025542.2273-1-syq@debian.org \
--to=syq@debian.org \
--cc=linux-mips@vger.kernel.org \
--cc=pburton@wavecomp.com \
--cc=ysu@wavecomp.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).