* [PATCH 1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz
@ 2019-01-18 1:06 Paul Cercueil
2019-01-18 1:06 ` [PATCH 2/8] dt-bindings: mtd: ingenic: Add compatible strings for the JZ4725B Paul Cercueil
` (7 more replies)
0 siblings, 8 replies; 17+ messages in thread
From: Paul Cercueil @ 2019-01-18 1:06 UTC (permalink / raw)
To: David Woodhouse, Brian Norris, Boris Brezillon, Marek Vasut,
Richard Weinberger, Rob Herring, Mark Rutland, Ralf Baechle,
Paul Burton, James Hogan, Miquel Raynal, Harvey Hunt
Cc: linux-mtd, devicetree, linux-kernel, linux-mips, Paul Cercueil
This is currently done inside the jz4780-bch driver, but it really
should be done here instead.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
arch/mips/boot/dts/ingenic/ci20.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
index 50cff3cbcc6d..aa892ec54d0a 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -111,6 +111,9 @@
pinctrl-names = "default";
pinctrl-0 = <&pins_nemc>;
+ assigned-clocks = <&cgu JZ4780_CLK_BCH>;
+ assigned-clock-rates = <200000000>;
+
nand@1 {
reg = <1>;
--
2.11.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 2/8] dt-bindings: mtd: ingenic: Add compatible strings for the JZ4725B
2019-01-18 1:06 [PATCH 1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz Paul Cercueil
@ 2019-01-18 1:06 ` Paul Cercueil
2019-01-18 8:20 ` Boris Brezillon
2019-01-18 1:06 ` [PATCH 3/8] mtd: rawnand: jz4780: Use SPDX license notifiers Paul Cercueil
` (6 subsequent siblings)
7 siblings, 1 reply; 17+ messages in thread
From: Paul Cercueil @ 2019-01-18 1:06 UTC (permalink / raw)
To: David Woodhouse, Brian Norris, Boris Brezillon, Marek Vasut,
Richard Weinberger, Rob Herring, Mark Rutland, Ralf Baechle,
Paul Burton, James Hogan, Miquel Raynal, Harvey Hunt
Cc: linux-mtd, devicetree, linux-kernel, linux-mips, Paul Cercueil
Add compatible strings to probe the jz4780-nand and jz4780-bch drivers
from devicetree on the JZ4725B SoC from Ingenic.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt b/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt
index 29ea5853ca91..8ebed442ac55 100644
--- a/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt
@@ -6,7 +6,9 @@ memory-controllers/ingenic,jz4780-nemc.txt), and thus NAND device nodes must
be children of the NEMC node.
Required NAND controller device properties:
-- compatible: Should be set to "ingenic,jz4780-nand".
+- compatible: Should be one of:
+ * ingenic,jz4725b-nand
+ * ingenic,jz4780-nand
- reg: For each bank with a NAND chip attached, should specify a bank number,
an offset of 0 and a size of 0x1000000 (i.e. the whole NEMC bank).
@@ -72,7 +74,9 @@ NAND devices. The following is a description of the device properties for a
BCH controller.
Required BCH properties:
-- compatible: Should be set to "ingenic,jz4780-bch".
+- compatible: Should be one of:
+ * ingenic,jz4725b-bch
+ * ingenic,jz4780-bch
- reg: Should specify the BCH controller registers location and length.
- clocks: Clock for the BCH controller.
--
2.11.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 3/8] mtd: rawnand: jz4780: Use SPDX license notifiers
2019-01-18 1:06 [PATCH 1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz Paul Cercueil
2019-01-18 1:06 ` [PATCH 2/8] dt-bindings: mtd: ingenic: Add compatible strings for the JZ4725B Paul Cercueil
@ 2019-01-18 1:06 ` Paul Cercueil
2019-01-18 8:22 ` Boris Brezillon
2019-01-18 1:06 ` [PATCH 4/8] mtd: rawnand: jz4780: Add support for the JZ4725B Paul Cercueil
` (5 subsequent siblings)
7 siblings, 1 reply; 17+ messages in thread
From: Paul Cercueil @ 2019-01-18 1:06 UTC (permalink / raw)
To: David Woodhouse, Brian Norris, Boris Brezillon, Marek Vasut,
Richard Weinberger, Rob Herring, Mark Rutland, Ralf Baechle,
Paul Burton, James Hogan, Miquel Raynal, Harvey Hunt
Cc: linux-mtd, devicetree, linux-kernel, linux-mips, Paul Cercueil
Use SPDX license notifiers instead of GPLv2 license text in the headers.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
drivers/mtd/nand/raw/jz4780_bch.c | 5 +----
drivers/mtd/nand/raw/jz4780_bch.h | 5 +----
drivers/mtd/nand/raw/jz4780_nand.c | 5 +----
3 files changed, 3 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/nand/raw/jz4780_bch.c b/drivers/mtd/nand/raw/jz4780_bch.c
index 7201827809e9..7e4e5e627603 100644
--- a/drivers/mtd/nand/raw/jz4780_bch.c
+++ b/drivers/mtd/nand/raw/jz4780_bch.c
@@ -1,12 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* JZ4780 BCH controller
*
* Copyright (c) 2015 Imagination Technologies
* Author: Alex Smith <alex.smith@imgtec.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
*/
#include <linux/bitops.h>
diff --git a/drivers/mtd/nand/raw/jz4780_bch.h b/drivers/mtd/nand/raw/jz4780_bch.h
index bf4718088a3a..451e0c770160 100644
--- a/drivers/mtd/nand/raw/jz4780_bch.h
+++ b/drivers/mtd/nand/raw/jz4780_bch.h
@@ -1,12 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* JZ4780 BCH controller
*
* Copyright (c) 2015 Imagination Technologies
* Author: Alex Smith <alex.smith@imgtec.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
*/
#ifndef __DRIVERS_MTD_NAND_JZ4780_BCH_H__
diff --git a/drivers/mtd/nand/raw/jz4780_nand.c b/drivers/mtd/nand/raw/jz4780_nand.c
index 22e58975f0d5..7f55358b860f 100644
--- a/drivers/mtd/nand/raw/jz4780_nand.c
+++ b/drivers/mtd/nand/raw/jz4780_nand.c
@@ -1,12 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* JZ4780 NAND driver
*
* Copyright (c) 2015 Imagination Technologies
* Author: Alex Smith <alex.smith@imgtec.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
*/
#include <linux/delay.h>
--
2.11.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 4/8] mtd: rawnand: jz4780: Add support for the JZ4725B
2019-01-18 1:06 [PATCH 1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz Paul Cercueil
2019-01-18 1:06 ` [PATCH 2/8] dt-bindings: mtd: ingenic: Add compatible strings for the JZ4725B Paul Cercueil
2019-01-18 1:06 ` [PATCH 3/8] mtd: rawnand: jz4780: Use SPDX license notifiers Paul Cercueil
@ 2019-01-18 1:06 ` Paul Cercueil
2019-01-18 8:26 ` Boris Brezillon
2019-01-18 1:06 ` [PATCH 5/8] mtd: rawnand: jz4780: Add ooblayout " Paul Cercueil
` (4 subsequent siblings)
7 siblings, 1 reply; 17+ messages in thread
From: Paul Cercueil @ 2019-01-18 1:06 UTC (permalink / raw)
To: David Woodhouse, Brian Norris, Boris Brezillon, Marek Vasut,
Richard Weinberger, Rob Herring, Mark Rutland, Ralf Baechle,
Paul Burton, James Hogan, Miquel Raynal, Harvey Hunt
Cc: linux-mtd, devicetree, linux-kernel, linux-mips, Paul Cercueil
Add support for probing the jz4780-nand driver on the JZ4725B SoC from
Ingenic.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
drivers/mtd/nand/raw/jz4780_nand.c | 39 +++++++++++++++++++++++++++++---------
1 file changed, 30 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/nand/raw/jz4780_nand.c b/drivers/mtd/nand/raw/jz4780_nand.c
index 7f55358b860f..cf24bf12884f 100644
--- a/drivers/mtd/nand/raw/jz4780_nand.c
+++ b/drivers/mtd/nand/raw/jz4780_nand.c
@@ -13,6 +13,7 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
+#include <linux/of_device.h>
#include <linux/gpio/consumer.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
@@ -26,13 +27,15 @@
#define DRV_NAME "jz4780-nand"
-#define OFFSET_DATA 0x00000000
-#define OFFSET_CMD 0x00400000
-#define OFFSET_ADDR 0x00800000
-
/* Command delay when there is no R/B pin. */
#define RB_DELAY_US 100
+struct jz_soc_info {
+ unsigned long data_offset;
+ unsigned long addr_offset;
+ unsigned long cmd_offset;
+};
+
struct jz4780_nand_cs {
unsigned int bank;
void __iomem *base;
@@ -40,6 +43,7 @@ struct jz4780_nand_cs {
struct jz4780_nand_controller {
struct device *dev;
+ const struct jz_soc_info *soc_info;
struct jz4780_bch *bch;
struct nand_controller controller;
unsigned int num_banks;
@@ -101,9 +105,9 @@ static void jz4780_nand_cmd_ctrl(struct nand_chip *chip, int cmd,
return;
if (ctrl & NAND_ALE)
- writeb(cmd, cs->base + OFFSET_ADDR);
+ writeb(cmd, cs->base + nfc->soc_info->addr_offset);
else if (ctrl & NAND_CLE)
- writeb(cmd, cs->base + OFFSET_CMD);
+ writeb(cmd, cs->base + nfc->soc_info->cmd_offset);
}
static int jz4780_nand_dev_ready(struct nand_chip *chip)
@@ -272,8 +276,8 @@ static int jz4780_nand_init_chip(struct platform_device *pdev,
return -ENOMEM;
mtd->dev.parent = dev;
- chip->legacy.IO_ADDR_R = cs->base + OFFSET_DATA;
- chip->legacy.IO_ADDR_W = cs->base + OFFSET_DATA;
+ chip->legacy.IO_ADDR_R = cs->base + nfc->soc_info->data_offset;
+ chip->legacy.IO_ADDR_W = cs->base + nfc->soc_info->data_offset;
chip->legacy.chip_delay = RB_DELAY_US;
chip->options = NAND_NO_SUBPAGE_WRITE;
chip->legacy.select_chip = jz4780_nand_select_chip;
@@ -353,6 +357,10 @@ static int jz4780_nand_probe(struct platform_device *pdev)
if (!nfc)
return -ENOMEM;
+ nfc->soc_info = device_get_match_data(dev);
+ if (!nfc->soc_info)
+ return -EINVAL;
+
/*
* Check for BCH HW before we call nand_scan_ident, to prevent us from
* having to call it again if the BCH driver returns -EPROBE_DEFER.
@@ -390,8 +398,21 @@ static int jz4780_nand_remove(struct platform_device *pdev)
return 0;
}
+static const struct jz_soc_info jz4725b_soc_info = {
+ .data_offset = 0x00000000,
+ .cmd_offset = 0x00008000,
+ .addr_offset = 0x00010000,
+};
+
+static const struct jz_soc_info jz4780_soc_info = {
+ .data_offset = 0x00000000,
+ .cmd_offset = 0x00400000,
+ .addr_offset = 0x00800000,
+};
+
static const struct of_device_id jz4780_nand_dt_match[] = {
- { .compatible = "ingenic,jz4780-nand" },
+ { .compatible = "ingenic,jz4725b-nand", .data = &jz4725b_soc_info },
+ { .compatible = "ingenic,jz4780-nand", .data = &jz4780_soc_info },
{},
};
MODULE_DEVICE_TABLE(of, jz4780_nand_dt_match);
--
2.11.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 5/8] mtd: rawnand: jz4780: Add ooblayout for the JZ4725B
2019-01-18 1:06 [PATCH 1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz Paul Cercueil
` (2 preceding siblings ...)
2019-01-18 1:06 ` [PATCH 4/8] mtd: rawnand: jz4780: Add support for the JZ4725B Paul Cercueil
@ 2019-01-18 1:06 ` Paul Cercueil
2019-01-18 8:29 ` Boris Brezillon
2019-01-18 1:06 ` [PATCH 6/8] mtd: rawnand: jz4780-bch: Don't set clock rate in driver Paul Cercueil
` (3 subsequent siblings)
7 siblings, 1 reply; 17+ messages in thread
From: Paul Cercueil @ 2019-01-18 1:06 UTC (permalink / raw)
To: David Woodhouse, Brian Norris, Boris Brezillon, Marek Vasut,
Richard Weinberger, Rob Herring, Mark Rutland, Ralf Baechle,
Paul Burton, James Hogan, Miquel Raynal, Harvey Hunt
Cc: linux-mtd, devicetree, linux-kernel, linux-mips, Paul Cercueil
The boot ROM of the JZ4725B SoC expects a specific OOB layout on the
NAND, so it makes sense to use this OOB layout unconditionally on this
SoC.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
drivers/mtd/nand/raw/jz4780_nand.c | 40 +++++++++++++++++++++++++++++++++++++-
1 file changed, 39 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/jz4780_nand.c b/drivers/mtd/nand/raw/jz4780_nand.c
index cf24bf12884f..073b3da5c3f7 100644
--- a/drivers/mtd/nand/raw/jz4780_nand.c
+++ b/drivers/mtd/nand/raw/jz4780_nand.c
@@ -34,6 +34,7 @@ struct jz_soc_info {
unsigned long data_offset;
unsigned long addr_offset;
unsigned long cmd_offset;
+ const struct mtd_ooblayout_ops *oob_layout;
};
struct jz4780_nand_cs {
@@ -208,7 +209,7 @@ static int jz4780_nand_attach_chip(struct nand_chip *chip)
return -EINVAL;
}
- mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
+ mtd_set_ooblayout(mtd, nfc->soc_info->oob_layout);
return 0;
}
@@ -398,16 +399,53 @@ static int jz4780_nand_remove(struct platform_device *pdev)
return 0;
}
+static int jz4725b_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *oobregion)
+{
+ struct nand_chip *chip = mtd_to_nand(mtd);
+ struct nand_ecc_ctrl *ecc = &chip->ecc;
+
+ if (section || !ecc->total)
+ return -ERANGE;
+
+ oobregion->length = ecc->total;
+ oobregion->offset = 3;
+
+ return 0;
+}
+
+static int jz4725b_ooblayout_free(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *oobregion)
+{
+ struct nand_chip *chip = mtd_to_nand(mtd);
+ struct nand_ecc_ctrl *ecc = &chip->ecc;
+
+ if (section)
+ return -ERANGE;
+
+ oobregion->length = mtd->oobsize - ecc->total - 3;
+ oobregion->offset = 3 + ecc->total;
+
+ return 0;
+}
+
+const struct mtd_ooblayout_ops jz4725b_ooblayout_ops = {
+ .ecc = jz4725b_ooblayout_ecc,
+ .free = jz4725b_ooblayout_free,
+};
+
static const struct jz_soc_info jz4725b_soc_info = {
.data_offset = 0x00000000,
.cmd_offset = 0x00008000,
.addr_offset = 0x00010000,
+ .oob_layout = &jz4725b_ooblayout_ops,
};
static const struct jz_soc_info jz4780_soc_info = {
.data_offset = 0x00000000,
.cmd_offset = 0x00400000,
.addr_offset = 0x00800000,
+ .oob_layout = &nand_ooblayout_lp_ops,
};
static const struct of_device_id jz4780_nand_dt_match[] = {
--
2.11.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 6/8] mtd: rawnand: jz4780-bch: Don't set clock rate in driver
2019-01-18 1:06 [PATCH 1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz Paul Cercueil
` (3 preceding siblings ...)
2019-01-18 1:06 ` [PATCH 5/8] mtd: rawnand: jz4780: Add ooblayout " Paul Cercueil
@ 2019-01-18 1:06 ` Paul Cercueil
2019-01-18 8:31 ` Boris Brezillon
2019-01-18 1:06 ` [PATCH 7/8] mtd: rawnand: jz4780-bch: Separate top-level and SoC specific code Paul Cercueil
` (2 subsequent siblings)
7 siblings, 1 reply; 17+ messages in thread
From: Paul Cercueil @ 2019-01-18 1:06 UTC (permalink / raw)
To: David Woodhouse, Brian Norris, Boris Brezillon, Marek Vasut,
Richard Weinberger, Rob Herring, Mark Rutland, Ralf Baechle,
Paul Burton, James Hogan, Miquel Raynal, Harvey Hunt
Cc: linux-mtd, devicetree, linux-kernel, linux-mips, Paul Cercueil
This should be done in devicetree. Besides, it prevents us from
supporting other SoCs which don't use the same clock frequency for the
BCH hardware.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
drivers/mtd/nand/raw/jz4780_bch.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/jz4780_bch.c b/drivers/mtd/nand/raw/jz4780_bch.c
index 7e4e5e627603..161d3821e1c4 100644
--- a/drivers/mtd/nand/raw/jz4780_bch.c
+++ b/drivers/mtd/nand/raw/jz4780_bch.c
@@ -57,8 +57,6 @@
#define BCH_BHINT_UNCOR BIT(1)
#define BCH_BHINT_ERR BIT(0)
-#define BCH_CLK_RATE (200 * 1000 * 1000)
-
/* Timeout for BCH calculation/correction. */
#define BCH_TIMEOUT_US 100000
@@ -348,8 +346,6 @@ static int jz4780_bch_probe(struct platform_device *pdev)
return PTR_ERR(bch->clk);
}
- clk_set_rate(bch->clk, BCH_CLK_RATE);
-
mutex_init(&bch->lock);
bch->dev = dev;
--
2.11.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 7/8] mtd: rawnand: jz4780-bch: Separate top-level and SoC specific code
2019-01-18 1:06 [PATCH 1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz Paul Cercueil
` (4 preceding siblings ...)
2019-01-18 1:06 ` [PATCH 6/8] mtd: rawnand: jz4780-bch: Don't set clock rate in driver Paul Cercueil
@ 2019-01-18 1:06 ` Paul Cercueil
2019-01-18 8:35 ` Boris Brezillon
2019-01-18 1:06 ` [PATCH 8/8] mtd: rawnand: jz4780-bch: Add support for the JZ4725B Paul Cercueil
2019-01-18 8:07 ` [PATCH 1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz Boris Brezillon
7 siblings, 1 reply; 17+ messages in thread
From: Paul Cercueil @ 2019-01-18 1:06 UTC (permalink / raw)
To: David Woodhouse, Brian Norris, Boris Brezillon, Marek Vasut,
Richard Weinberger, Rob Herring, Mark Rutland, Ralf Baechle,
Paul Burton, James Hogan, Miquel Raynal, Harvey Hunt
Cc: linux-mtd, devicetree, linux-kernel, linux-mips, Paul Cercueil
The jz4780-nand driver uses an API provided by the jz4780-bch driver.
This makes it difficult to support other SoCs in the jz4780-bch driver.
To work around this, we separate the API functions from the SoC-specific
code, so that these API functions are SoC-agnostic.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
drivers/mtd/nand/raw/Makefile | 3 +-
drivers/mtd/nand/raw/jz4780_bch.c | 173 +++--------------------------
drivers/mtd/nand/raw/jz4780_bch_common.c | 172 ++++++++++++++++++++++++++++
drivers/mtd/nand/raw/jz4780_bch_internal.h | 34 ++++++
4 files changed, 222 insertions(+), 160 deletions(-)
create mode 100644 drivers/mtd/nand/raw/jz4780_bch_common.c
create mode 100644 drivers/mtd/nand/raw/jz4780_bch_internal.h
diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
index 57159b349054..6dacc9cf38d5 100644
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -46,7 +46,8 @@ obj-$(CONFIG_MTD_NAND_MPC5121_NFC) += mpc5121_nfc.o
obj-$(CONFIG_MTD_NAND_VF610_NFC) += vf610_nfc.o
obj-$(CONFIG_MTD_NAND_RICOH) += r852.o
obj-$(CONFIG_MTD_NAND_JZ4740) += jz4740_nand.o
-obj-$(CONFIG_MTD_NAND_JZ4780) += jz4780_nand.o jz4780_bch.o
+obj-$(CONFIG_MTD_NAND_JZ4780) += jz4780_nand.o jz4780_bch_common.o \
+ jz4780_bch.o
obj-$(CONFIG_MTD_NAND_GPMI_NAND) += gpmi-nand/
obj-$(CONFIG_MTD_NAND_XWAY) += xway_nand.o
obj-$(CONFIG_MTD_NAND_BCM47XXNFLASH) += bcm47xxnflash/
diff --git a/drivers/mtd/nand/raw/jz4780_bch.c b/drivers/mtd/nand/raw/jz4780_bch.c
index 161d3821e1c4..1dfc960067b3 100644
--- a/drivers/mtd/nand/raw/jz4780_bch.c
+++ b/drivers/mtd/nand/raw/jz4780_bch.c
@@ -1,25 +1,19 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * JZ4780 BCH controller
+ * JZ4780 backend code for the jz4780-bch driver
*
* Copyright (c) 2015 Imagination Technologies
* Author: Alex Smith <alex.smith@imgtec.com>
*/
#include <linux/bitops.h>
-#include <linux/clk.h>
-#include <linux/delay.h>
-#include <linux/init.h>
#include <linux/iopoll.h>
-#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
-#include <linux/of_platform.h>
-#include <linux/platform_device.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
+#include <linux/device.h>
#include "jz4780_bch.h"
+#include "jz4780_bch_internal.h"
#define BCH_BHCR 0x0
#define BCH_BHCCR 0x8
@@ -60,13 +54,6 @@
/* Timeout for BCH calculation/correction. */
#define BCH_TIMEOUT_US 100000
-struct jz4780_bch {
- struct device *dev;
- void __iomem *base;
- struct clk *clk;
- struct mutex lock;
-};
-
static void jz4780_bch_init(struct jz4780_bch *bch,
struct jz4780_bch_params *params, bool encode)
{
@@ -165,18 +152,9 @@ static bool jz4780_bch_wait_complete(struct jz4780_bch *bch, unsigned int irq,
return true;
}
-/**
- * jz4780_bch_calculate() - calculate ECC for a data buffer
- * @bch: BCH device.
- * @params: BCH parameters.
- * @buf: input buffer with raw data.
- * @ecc_code: output buffer with ECC.
- *
- * Return: 0 on success, -ETIMEDOUT if timed out while waiting for BCH
- * controller.
- */
-int jz4780_bch_calculate(struct jz4780_bch *bch, struct jz4780_bch_params *params,
- const u8 *buf, u8 *ecc_code)
+static int jz4780_calculate(struct jz4780_bch *bch,
+ struct jz4780_bch_params *params,
+ const u8 *buf, u8 *ecc_code)
{
int ret = 0;
@@ -195,23 +173,10 @@ int jz4780_bch_calculate(struct jz4780_bch *bch, struct jz4780_bch_params *param
mutex_unlock(&bch->lock);
return ret;
}
-EXPORT_SYMBOL(jz4780_bch_calculate);
-
-/**
- * jz4780_bch_correct() - detect and correct bit errors
- * @bch: BCH device.
- * @params: BCH parameters.
- * @buf: raw data read from the chip.
- * @ecc_code: ECC read from the chip.
- *
- * Given the raw data and the ECC read from the NAND device, detects and
- * corrects errors in the data.
- *
- * Return: the number of bit errors corrected, -EBADMSG if there are too many
- * errors to correct or -ETIMEDOUT if we timed out waiting for the controller.
- */
-int jz4780_bch_correct(struct jz4780_bch *bch, struct jz4780_bch_params *params,
- u8 *buf, u8 *ecc_code)
+
+static int jz4780_correct(struct jz4780_bch *bch,
+ struct jz4780_bch_params *params,
+ u8 *buf, u8 *ecc_code)
{
u32 reg, mask, index;
int i, ret, count;
@@ -257,119 +222,9 @@ int jz4780_bch_correct(struct jz4780_bch *bch, struct jz4780_bch_params *params,
mutex_unlock(&bch->lock);
return ret;
}
-EXPORT_SYMBOL(jz4780_bch_correct);
-
-/**
- * jz4780_bch_get() - get the BCH controller device
- * @np: BCH device tree node.
- *
- * Gets the BCH controller device from the specified device tree node. The
- * device must be released with jz4780_bch_release() when it is no longer being
- * used.
- *
- * Return: a pointer to jz4780_bch, errors are encoded into the pointer.
- * PTR_ERR(-EPROBE_DEFER) if the device hasn't been initialised yet.
- */
-static struct jz4780_bch *jz4780_bch_get(struct device_node *np)
-{
- struct platform_device *pdev;
- struct jz4780_bch *bch;
-
- pdev = of_find_device_by_node(np);
- if (!pdev || !platform_get_drvdata(pdev))
- return ERR_PTR(-EPROBE_DEFER);
-
- get_device(&pdev->dev);
-
- bch = platform_get_drvdata(pdev);
- clk_prepare_enable(bch->clk);
-
- return bch;
-}
-
-/**
- * of_jz4780_bch_get() - get the BCH controller from a DT node
- * @of_node: the node that contains a bch-controller property.
- *
- * Get the bch-controller property from the given device tree
- * node and pass it to jz4780_bch_get to do the work.
- *
- * Return: a pointer to jz4780_bch, errors are encoded into the pointer.
- * PTR_ERR(-EPROBE_DEFER) if the device hasn't been initialised yet.
- */
-struct jz4780_bch *of_jz4780_bch_get(struct device_node *of_node)
-{
- struct jz4780_bch *bch = NULL;
- struct device_node *np;
- np = of_parse_phandle(of_node, "ingenic,bch-controller", 0);
-
- if (np) {
- bch = jz4780_bch_get(np);
- of_node_put(np);
- }
- return bch;
-}
-EXPORT_SYMBOL(of_jz4780_bch_get);
-
-/**
- * jz4780_bch_release() - release the BCH controller device
- * @bch: BCH device.
- */
-void jz4780_bch_release(struct jz4780_bch *bch)
-{
- clk_disable_unprepare(bch->clk);
- put_device(bch->dev);
-}
-EXPORT_SYMBOL(jz4780_bch_release);
-
-static int jz4780_bch_probe(struct platform_device *pdev)
-{
- struct device *dev = &pdev->dev;
- struct jz4780_bch *bch;
- struct resource *res;
-
- bch = devm_kzalloc(dev, sizeof(*bch), GFP_KERNEL);
- if (!bch)
- return -ENOMEM;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- bch->base = devm_ioremap_resource(dev, res);
- if (IS_ERR(bch->base))
- return PTR_ERR(bch->base);
-
- jz4780_bch_disable(bch);
-
- bch->clk = devm_clk_get(dev, NULL);
- if (IS_ERR(bch->clk)) {
- dev_err(dev, "failed to get clock: %ld\n", PTR_ERR(bch->clk));
- return PTR_ERR(bch->clk);
- }
-
- mutex_init(&bch->lock);
-
- bch->dev = dev;
- platform_set_drvdata(pdev, bch);
-
- return 0;
-}
-
-static const struct of_device_id jz4780_bch_dt_match[] = {
- { .compatible = "ingenic,jz4780-bch" },
- {},
+const struct jz4780_bch_ops jz4780_bch_jz4780_ops = {
+ .disable = jz4780_bch_disable,
+ .calculate = jz4780_calculate,
+ .correct = jz4780_correct,
};
-MODULE_DEVICE_TABLE(of, jz4780_bch_dt_match);
-
-static struct platform_driver jz4780_bch_driver = {
- .probe = jz4780_bch_probe,
- .driver = {
- .name = "jz4780-bch",
- .of_match_table = of_match_ptr(jz4780_bch_dt_match),
- },
-};
-module_platform_driver(jz4780_bch_driver);
-
-MODULE_AUTHOR("Alex Smith <alex@alex-smith.me.uk>");
-MODULE_AUTHOR("Harvey Hunt <harveyhuntnexus@gmail.com>");
-MODULE_DESCRIPTION("Ingenic JZ4780 BCH error correction driver");
-MODULE_LICENSE("GPL v2");
diff --git a/drivers/mtd/nand/raw/jz4780_bch_common.c b/drivers/mtd/nand/raw/jz4780_bch_common.c
new file mode 100644
index 000000000000..573b079e6cbe
--- /dev/null
+++ b/drivers/mtd/nand/raw/jz4780_bch_common.c
@@ -0,0 +1,172 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * JZ4780 BCH controller
+ *
+ * Copyright (c) 2015 Imagination Technologies
+ * Author: Alex Smith <alex.smith@imgtec.com>
+ */
+
+#include <linux/clk.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+
+#include "jz4780_bch_internal.h"
+#include "jz4780_bch.h"
+
+/**
+ * jz4780_bch_calculate() - calculate ECC for a data buffer
+ * @bch: BCH device.
+ * @params: BCH parameters.
+ * @buf: input buffer with raw data.
+ * @ecc_code: output buffer with ECC.
+ *
+ * Return: 0 on success, -ETIMEDOUT if timed out while waiting for BCH
+ * controller.
+ */
+int jz4780_bch_calculate(struct jz4780_bch *bch, struct jz4780_bch_params *params,
+ const u8 *buf, u8 *ecc_code)
+{
+ return bch->ops->calculate(bch, params, buf, ecc_code);
+}
+EXPORT_SYMBOL(jz4780_bch_calculate);
+
+/**
+ * jz4780_bch_correct() - detect and correct bit errors
+ * @bch: BCH device.
+ * @params: BCH parameters.
+ * @buf: raw data read from the chip.
+ * @ecc_code: ECC read from the chip.
+ *
+ * Given the raw data and the ECC read from the NAND device, detects and
+ * corrects errors in the data.
+ *
+ * Return: the number of bit errors corrected, -EBADMSG if there are too many
+ * errors to correct or -ETIMEDOUT if we timed out waiting for the controller.
+ */
+int jz4780_bch_correct(struct jz4780_bch *bch, struct jz4780_bch_params *params,
+ u8 *buf, u8 *ecc_code)
+{
+ return bch->ops->correct(bch, params, buf, ecc_code);
+}
+EXPORT_SYMBOL(jz4780_bch_correct);
+
+/**
+ * jz4780_bch_get() - get the BCH controller device
+ * @np: BCH device tree node.
+ *
+ * Gets the BCH controller device from the specified device tree node. The
+ * device must be released with jz4780_bch_release() when it is no longer being
+ * used.
+ *
+ * Return: a pointer to jz4780_bch, errors are encoded into the pointer.
+ * PTR_ERR(-EPROBE_DEFER) if the device hasn't been initialised yet.
+ */
+static struct jz4780_bch *jz4780_bch_get(struct device_node *np)
+{
+ struct platform_device *pdev;
+ struct jz4780_bch *bch;
+
+ pdev = of_find_device_by_node(np);
+ if (!pdev || !platform_get_drvdata(pdev))
+ return ERR_PTR(-EPROBE_DEFER);
+
+ get_device(&pdev->dev);
+
+ bch = platform_get_drvdata(pdev);
+ clk_prepare_enable(bch->clk);
+
+ return bch;
+}
+
+/**
+ * of_jz4780_bch_get() - get the BCH controller from a DT node
+ * @of_node: the node that contains a bch-controller property.
+ *
+ * Get the bch-controller property from the given device tree
+ * node and pass it to jz4780_bch_get to do the work.
+ *
+ * Return: a pointer to jz4780_bch, errors are encoded into the pointer.
+ * PTR_ERR(-EPROBE_DEFER) if the device hasn't been initialised yet.
+ */
+struct jz4780_bch *of_jz4780_bch_get(struct device_node *of_node)
+{
+ struct jz4780_bch *bch = NULL;
+ struct device_node *np;
+
+ np = of_parse_phandle(of_node, "ingenic,bch-controller", 0);
+
+ if (np) {
+ bch = jz4780_bch_get(np);
+ of_node_put(np);
+ }
+ return bch;
+}
+EXPORT_SYMBOL(of_jz4780_bch_get);
+
+/**
+ * jz4780_bch_release() - release the BCH controller device
+ * @bch: BCH device.
+ */
+void jz4780_bch_release(struct jz4780_bch *bch)
+{
+ clk_disable_unprepare(bch->clk);
+ put_device(bch->dev);
+}
+EXPORT_SYMBOL(jz4780_bch_release);
+
+static int jz4780_bch_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct jz4780_bch *bch;
+ struct resource *res;
+
+ bch = devm_kzalloc(dev, sizeof(*bch), GFP_KERNEL);
+ if (!bch)
+ return -ENOMEM;
+
+ bch->ops = device_get_match_data(dev);
+ if (!bch->ops)
+ return -EINVAL;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ bch->base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(bch->base))
+ return PTR_ERR(bch->base);
+
+ bch->ops->disable(bch);
+
+ bch->clk = devm_clk_get(dev, NULL);
+ if (IS_ERR(bch->clk)) {
+ dev_err(dev, "failed to get clock: %ld\n", PTR_ERR(bch->clk));
+ return PTR_ERR(bch->clk);
+ }
+
+ mutex_init(&bch->lock);
+
+ bch->dev = dev;
+ platform_set_drvdata(pdev, bch);
+
+ return 0;
+}
+
+static const struct of_device_id jz4780_bch_dt_match[] = {
+ { .compatible = "ingenic,jz4780-bch", .data = &jz4780_bch_jz4780_ops },
+ {},
+};
+MODULE_DEVICE_TABLE(of, jz4780_bch_dt_match);
+
+static struct platform_driver jz4780_bch_driver = {
+ .probe = jz4780_bch_probe,
+ .driver = {
+ .name = "jz4780-bch",
+ .of_match_table = of_match_ptr(jz4780_bch_dt_match),
+ },
+};
+module_platform_driver(jz4780_bch_driver);
+
+MODULE_AUTHOR("Alex Smith <alex@alex-smith.me.uk>");
+MODULE_AUTHOR("Harvey Hunt <harveyhuntnexus@gmail.com>");
+MODULE_DESCRIPTION("Ingenic JZ4780 BCH error correction driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/mtd/nand/raw/jz4780_bch_internal.h b/drivers/mtd/nand/raw/jz4780_bch_internal.h
new file mode 100644
index 000000000000..7162e4f872f4
--- /dev/null
+++ b/drivers/mtd/nand/raw/jz4780_bch_internal.h
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DRIVERS_MTD_NAND_JZ4780_BCH_INTERNAL_H__
+#define __DRIVERS_MTD_NAND_JZ4780_BCH_INTERNAL_H__
+
+#include <linux/compiler_types.h>
+#include <linux/mutex.h>
+#include <linux/types.h>
+
+struct jz4780_bch_params;
+struct jz4780_bch;
+struct device;
+struct clk;
+
+struct jz4780_bch_ops {
+ void (*disable)(struct jz4780_bch *bch);
+ int (*calculate)(struct jz4780_bch *bch,
+ struct jz4780_bch_params *params,
+ const u8 *buf, u8 *ecc_code);
+ int (*correct)(struct jz4780_bch *bch,
+ struct jz4780_bch_params *params,
+ u8 *buf, u8 *ecc_code);
+};
+
+struct jz4780_bch {
+ struct device *dev;
+ const struct jz4780_bch_ops *ops;
+ void __iomem *base;
+ struct clk *clk;
+ struct mutex lock;
+};
+
+extern const struct jz4780_bch_ops jz4780_bch_jz4780_ops;
+
+#endif /* __DRIVERS_MTD_NAND_JZ4780_BCH_INTERNAL_H__ */
--
2.11.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 8/8] mtd: rawnand: jz4780-bch: Add support for the JZ4725B
2019-01-18 1:06 [PATCH 1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz Paul Cercueil
` (5 preceding siblings ...)
2019-01-18 1:06 ` [PATCH 7/8] mtd: rawnand: jz4780-bch: Separate top-level and SoC specific code Paul Cercueil
@ 2019-01-18 1:06 ` Paul Cercueil
2019-01-18 8:07 ` [PATCH 1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz Boris Brezillon
7 siblings, 0 replies; 17+ messages in thread
From: Paul Cercueil @ 2019-01-18 1:06 UTC (permalink / raw)
To: David Woodhouse, Brian Norris, Boris Brezillon, Marek Vasut,
Richard Weinberger, Rob Herring, Mark Rutland, Ralf Baechle,
Paul Burton, James Hogan, Miquel Raynal, Harvey Hunt
Cc: linux-mtd, devicetree, linux-kernel, linux-mips, Paul Cercueil
Add the backend code for the jz4780-bch driver to support the JZ4725B
SoC from Ingenic.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
drivers/mtd/nand/raw/Makefile | 2 +-
drivers/mtd/nand/raw/jz4725b_bch.c | 234 +++++++++++++++++++++++++++++
drivers/mtd/nand/raw/jz4780_bch_common.c | 1 +
drivers/mtd/nand/raw/jz4780_bch_internal.h | 1 +
4 files changed, 237 insertions(+), 1 deletion(-)
create mode 100644 drivers/mtd/nand/raw/jz4725b_bch.c
diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
index 6dacc9cf38d5..99cc9317a218 100644
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -47,7 +47,7 @@ obj-$(CONFIG_MTD_NAND_VF610_NFC) += vf610_nfc.o
obj-$(CONFIG_MTD_NAND_RICOH) += r852.o
obj-$(CONFIG_MTD_NAND_JZ4740) += jz4740_nand.o
obj-$(CONFIG_MTD_NAND_JZ4780) += jz4780_nand.o jz4780_bch_common.o \
- jz4780_bch.o
+ jz4780_bch.o jz4725b_bch.o
obj-$(CONFIG_MTD_NAND_GPMI_NAND) += gpmi-nand/
obj-$(CONFIG_MTD_NAND_XWAY) += xway_nand.o
obj-$(CONFIG_MTD_NAND_BCM47XXNFLASH) += bcm47xxnflash/
diff --git a/drivers/mtd/nand/raw/jz4725b_bch.c b/drivers/mtd/nand/raw/jz4725b_bch.c
new file mode 100644
index 000000000000..54f9c5796e83
--- /dev/null
+++ b/drivers/mtd/nand/raw/jz4725b_bch.c
@@ -0,0 +1,234 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * JZ4780 backend code for the jz4780-bch driver
+ *
+ * Copyright (C) 2018 Paul Cercueil <paul@crapouillou.net>
+ *
+ * Based on jz4780_bch.c
+ */
+
+#include <linux/bitops.h>
+#include <linux/iopoll.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
+#include <linux/device.h>
+
+#include "jz4780_bch.h"
+#include "jz4780_bch_internal.h"
+
+#define BCH_BHCR 0x0
+#define BCH_BHCSR 0x4
+#define BCH_BHCCR 0x8
+#define BCH_BHCNT 0xc
+#define BCH_BHDR 0x10
+#define BCH_BHPAR0 0x14
+#define BCH_BHERR0 0x28
+#define BCH_BHINT 0x24
+#define BCH_BHINTES 0x3c
+#define BCH_BHINTEC 0x40
+#define BCH_BHINTE 0x38
+
+#define BCH_BHCR_BSEL_SHIFT 2
+#define BCH_BHCR_BSEL_MASK (0x1 << BCH_BHCR_BSEL_SHIFT)
+#define BCH_BHCR_ENCE BIT(3)
+#define BCH_BHCR_INIT BIT(1)
+#define BCH_BHCR_BCHE BIT(0)
+
+#define BCH_BHCNT_DEC_COUNT_SHIFT 16
+#define BCH_BHCNT_DEC_COUNT_MASK (0x3ff << BCH_BHCNT_DEC_COUNT_SHIFT)
+#define BCH_BHCNT_ENC_COUNT_SHIFT 0
+#define BCH_BHCNT_ENC_COUNT_MASK (0x3ff << BCH_BHCNT_ENC_COUNT_SHIFT)
+
+#define BCH_BHERR_INDEX0_SHIFT 0
+#define BCH_BHERR_INDEX0_MASK (0x1fff << BCH_BHERR_INDEX0_SHIFT)
+#define BCH_BHERR_INDEX1_SHIFT 16
+#define BCH_BHERR_INDEX1_MASK (0x1fff << BCH_BHERR_INDEX1_SHIFT)
+
+#define BCH_BHINT_ERRC_SHIFT 28
+#define BCH_BHINT_ERRC_MASK (0xf << BCH_BHINT_ERRC_SHIFT)
+#define BCH_BHINT_TERRC_SHIFT 16
+#define BCH_BHINT_TERRC_MASK (0x7f << BCH_BHINT_TERRC_SHIFT)
+#define BCH_BHINT_ALL_0 BIT(5)
+#define BCH_BHINT_ALL_F BIT(4)
+#define BCH_BHINT_DECF BIT(3)
+#define BCH_BHINT_ENCF BIT(2)
+#define BCH_BHINT_UNCOR BIT(1)
+#define BCH_BHINT_ERR BIT(0)
+
+/* Timeout for BCH calculation/correction. */
+#define BCH_TIMEOUT_US 100000
+
+static void jz4725b_bch_init(struct jz4780_bch *bch,
+ struct jz4780_bch_params *params, bool encode)
+{
+ u32 reg;
+
+ /* Clear interrupt status. */
+ writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT);
+
+ /* Initialise and enable BCH. */
+ writel(0x1f, bch->base + BCH_BHCCR);
+ writel(BCH_BHCR_BCHE, bch->base + BCH_BHCSR);
+
+ if (params->strength == 8)
+ writel(BCH_BHCR_BSEL_MASK, bch->base + BCH_BHCSR);
+ else
+ writel(BCH_BHCR_BSEL_MASK, bch->base + BCH_BHCCR);
+
+ if (encode)
+ writel(BCH_BHCR_ENCE, bch->base + BCH_BHCSR);
+ else
+ writel(BCH_BHCR_ENCE, bch->base + BCH_BHCCR);
+
+ writel(BCH_BHCR_INIT, bch->base + BCH_BHCSR);
+
+ /* Set up BCH count register. */
+ reg = params->size << BCH_BHCNT_ENC_COUNT_SHIFT;
+ reg |= (params->size + params->bytes) << BCH_BHCNT_DEC_COUNT_SHIFT;
+ writel(reg, bch->base + BCH_BHCNT);
+}
+
+static void jz4725b_bch_disable(struct jz4780_bch *bch)
+{
+ writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT);
+ writel(BCH_BHCR_BCHE, bch->base + BCH_BHCCR);
+}
+
+static void jz4725b_bch_write_data(struct jz4780_bch *bch, const u8 *buf,
+ size_t size)
+{
+ while (size--)
+ writeb(*buf++, bch->base + BCH_BHDR);
+}
+
+static void jz4725b_bch_read_parity(struct jz4780_bch *bch, u8 *buf,
+ size_t size)
+{
+ size_t size32 = size / sizeof(u32);
+ size_t size8 = size % sizeof(u32);
+ u32 *dest32;
+ u8 *dest8;
+ u32 val, offset = 0;
+
+ dest32 = (u32 *)buf;
+ while (size32--) {
+ *dest32++ = readl(bch->base + BCH_BHPAR0 + offset);
+ offset += sizeof(u32);
+ }
+
+ dest8 = (u8 *)dest32;
+ val = readl(bch->base + BCH_BHPAR0 + offset);
+ switch (size8) {
+ case 3:
+ dest8[2] = (val >> 16) & 0xff;
+ case 2:
+ dest8[1] = (val >> 8) & 0xff;
+ case 1:
+ dest8[0] = val & 0xff;
+ break;
+ }
+}
+
+static bool jz4725b_bch_wait_complete(struct jz4780_bch *bch, unsigned int irq,
+ u32 *status)
+{
+ u32 reg;
+ int ret;
+
+ /*
+ * While we could use interrupts here and sleep until the operation
+ * completes, the controller works fairly quickly (usually a few
+ * microseconds) and so the overhead of sleeping until we get an
+ * interrupt quite noticeably decreases performance.
+ */
+ ret = readl_poll_timeout(bch->base + BCH_BHINT, reg,
+ (reg & irq) == irq, 0, BCH_TIMEOUT_US);
+ if (ret)
+ return false;
+
+ if (status)
+ *status = reg;
+
+ writel(reg, bch->base + BCH_BHINT);
+ return true;
+}
+
+static int jz4725b_calculate(struct jz4780_bch *bch,
+ struct jz4780_bch_params *params,
+ const u8 *buf, u8 *ecc_code)
+{
+ int ret = 0;
+
+ mutex_lock(&bch->lock);
+ jz4725b_bch_init(bch, params, true);
+ jz4725b_bch_write_data(bch, buf, params->size);
+
+ if (jz4725b_bch_wait_complete(bch, BCH_BHINT_ENCF, NULL)) {
+ jz4725b_bch_read_parity(bch, ecc_code, params->bytes);
+ } else {
+ dev_err(bch->dev, "timed out while calculating ECC\n");
+ ret = -ETIMEDOUT;
+ }
+
+ jz4725b_bch_disable(bch);
+ mutex_unlock(&bch->lock);
+ return ret;
+}
+
+static int jz4725b_correct(struct jz4780_bch *bch,
+ struct jz4780_bch_params *params,
+ u8 *buf, u8 *ecc_code)
+{
+ u32 reg, errors, bit;
+ unsigned int i;
+ int ret = 0;
+
+ mutex_lock(&bch->lock);
+
+ jz4725b_bch_init(bch, params, false);
+ jz4725b_bch_write_data(bch, buf, params->size);
+ jz4725b_bch_write_data(bch, ecc_code, params->bytes);
+
+ if (!jz4725b_bch_wait_complete(bch, BCH_BHINT_DECF, ®)) {
+ dev_err(bch->dev, "timed out while correcting data\n");
+ ret = -ETIMEDOUT;
+ goto out;
+ }
+
+ if (reg & (BCH_BHINT_ALL_F | BCH_BHINT_ALL_0)) {
+ /* Data and ECC is all 0xff or 0x00 - nothing to correct */
+ ret = 0;
+ goto out;
+ }
+
+ if (reg & BCH_BHINT_UNCOR) {
+ /* Uncorrectable ECC error */
+ ret = -EBADMSG;
+ goto out;
+ }
+
+ errors = (reg & BCH_BHINT_ERRC_MASK) >> BCH_BHINT_ERRC_SHIFT;
+
+ /* Correct any detected errors. */
+ for (i = 0; i < errors; i++) {
+ if (i & 1) {
+ bit = (reg & BCH_BHERR_INDEX1_MASK) >> BCH_BHERR_INDEX1_SHIFT;
+ } else {
+ reg = readl(bch->base + BCH_BHERR0 + (i * 4));
+ bit = (reg & BCH_BHERR_INDEX0_MASK) >> BCH_BHERR_INDEX0_SHIFT;
+ }
+
+ buf[(bit >> 3)] ^= BIT(bit & 0x7);
+ }
+
+out:
+ jz4725b_bch_disable(bch);
+ mutex_unlock(&bch->lock);
+ return ret;
+}
+
+const struct jz4780_bch_ops jz4780_bch_jz4725b_ops = {
+ .disable = jz4725b_bch_disable,
+ .calculate = jz4725b_calculate,
+ .correct = jz4725b_correct,
+};
diff --git a/drivers/mtd/nand/raw/jz4780_bch_common.c b/drivers/mtd/nand/raw/jz4780_bch_common.c
index 573b079e6cbe..5b5ab4e66c49 100644
--- a/drivers/mtd/nand/raw/jz4780_bch_common.c
+++ b/drivers/mtd/nand/raw/jz4780_bch_common.c
@@ -152,6 +152,7 @@ static int jz4780_bch_probe(struct platform_device *pdev)
}
static const struct of_device_id jz4780_bch_dt_match[] = {
+ { .compatible = "ingenic,jz4725b-bch", .data = &jz4780_bch_jz4725b_ops},
{ .compatible = "ingenic,jz4780-bch", .data = &jz4780_bch_jz4780_ops },
{},
};
diff --git a/drivers/mtd/nand/raw/jz4780_bch_internal.h b/drivers/mtd/nand/raw/jz4780_bch_internal.h
index 7162e4f872f4..cc12b782a8d9 100644
--- a/drivers/mtd/nand/raw/jz4780_bch_internal.h
+++ b/drivers/mtd/nand/raw/jz4780_bch_internal.h
@@ -29,6 +29,7 @@ struct jz4780_bch {
struct mutex lock;
};
+extern const struct jz4780_bch_ops jz4780_bch_jz4725b_ops;
extern const struct jz4780_bch_ops jz4780_bch_jz4780_ops;
#endif /* __DRIVERS_MTD_NAND_JZ4780_BCH_INTERNAL_H__ */
--
2.11.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz
2019-01-18 1:06 [PATCH 1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz Paul Cercueil
` (6 preceding siblings ...)
2019-01-18 1:06 ` [PATCH 8/8] mtd: rawnand: jz4780-bch: Add support for the JZ4725B Paul Cercueil
@ 2019-01-18 8:07 ` Boris Brezillon
2019-01-18 14:15 ` Paul Cercueil
7 siblings, 1 reply; 17+ messages in thread
From: Boris Brezillon @ 2019-01-18 8:07 UTC (permalink / raw)
To: Paul Cercueil
Cc: David Woodhouse, Brian Norris, Marek Vasut, Richard Weinberger,
Rob Herring, Mark Rutland, Ralf Baechle, Paul Burton,
James Hogan, Miquel Raynal, Harvey Hunt, linux-mtd, devicetree,
linux-kernel, linux-mips
Hi Paul,
On Thu, 17 Jan 2019 22:06:27 -0300
Paul Cercueil <paul@crapouillou.net> wrote:
> This is currently done inside the jz4780-bch driver, but it really
> should be done here instead.
>
I disagree with that statement. If it's a per-SoC constraint then you
can select the appropriate rate based on the compatible in the driver.
If the clock rate depends on the NAND chip it probably means it's used
to generate the RE/WE pulse and should depend on the NAND timings
passed to ->setup_data_interface(). In either case, this should not be
specified in the DT.
Regards,
Boris
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> ---
> arch/mips/boot/dts/ingenic/ci20.dts | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
> index 50cff3cbcc6d..aa892ec54d0a 100644
> --- a/arch/mips/boot/dts/ingenic/ci20.dts
> +++ b/arch/mips/boot/dts/ingenic/ci20.dts
> @@ -111,6 +111,9 @@
> pinctrl-names = "default";
> pinctrl-0 = <&pins_nemc>;
>
> + assigned-clocks = <&cgu JZ4780_CLK_BCH>;
> + assigned-clock-rates = <200000000>;
> +
> nand@1 {
> reg = <1>;
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 2/8] dt-bindings: mtd: ingenic: Add compatible strings for the JZ4725B
2019-01-18 1:06 ` [PATCH 2/8] dt-bindings: mtd: ingenic: Add compatible strings for the JZ4725B Paul Cercueil
@ 2019-01-18 8:20 ` Boris Brezillon
0 siblings, 0 replies; 17+ messages in thread
From: Boris Brezillon @ 2019-01-18 8:20 UTC (permalink / raw)
To: Paul Cercueil
Cc: David Woodhouse, Brian Norris, Marek Vasut, Richard Weinberger,
Rob Herring, Mark Rutland, Ralf Baechle, Paul Burton,
James Hogan, Miquel Raynal, Harvey Hunt, linux-mtd, devicetree,
linux-kernel, linux-mips
On Thu, 17 Jan 2019 22:06:28 -0300
Paul Cercueil <paul@crapouillou.net> wrote:
> Add compatible strings to probe the jz4780-nand and jz4780-bch drivers
> from devicetree on the JZ4725B SoC from Ingenic.
>
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
> ---
> Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt b/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt
> index 29ea5853ca91..8ebed442ac55 100644
> --- a/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt
> +++ b/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt
> @@ -6,7 +6,9 @@ memory-controllers/ingenic,jz4780-nemc.txt), and thus NAND device nodes must
> be children of the NEMC node.
>
> Required NAND controller device properties:
> -- compatible: Should be set to "ingenic,jz4780-nand".
> +- compatible: Should be one of:
> + * ingenic,jz4725b-nand
> + * ingenic,jz4780-nand
> - reg: For each bank with a NAND chip attached, should specify a bank number,
> an offset of 0 and a size of 0x1000000 (i.e. the whole NEMC bank).
>
> @@ -72,7 +74,9 @@ NAND devices. The following is a description of the device properties for a
> BCH controller.
>
> Required BCH properties:
> -- compatible: Should be set to "ingenic,jz4780-bch".
> +- compatible: Should be one of:
> + * ingenic,jz4725b-bch
> + * ingenic,jz4780-bch
> - reg: Should specify the BCH controller registers location and length.
> - clocks: Clock for the BCH controller.
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 3/8] mtd: rawnand: jz4780: Use SPDX license notifiers
2019-01-18 1:06 ` [PATCH 3/8] mtd: rawnand: jz4780: Use SPDX license notifiers Paul Cercueil
@ 2019-01-18 8:22 ` Boris Brezillon
0 siblings, 0 replies; 17+ messages in thread
From: Boris Brezillon @ 2019-01-18 8:22 UTC (permalink / raw)
To: Paul Cercueil
Cc: David Woodhouse, Brian Norris, Marek Vasut, Richard Weinberger,
Rob Herring, Mark Rutland, Ralf Baechle, Paul Burton,
James Hogan, Miquel Raynal, Harvey Hunt, linux-mtd, devicetree,
linux-kernel, linux-mips
On Thu, 17 Jan 2019 22:06:29 -0300
Paul Cercueil <paul@crapouillou.net> wrote:
> Use SPDX license notifiers instead of GPLv2 license text in the headers.
>
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
> ---
> drivers/mtd/nand/raw/jz4780_bch.c | 5 +----
> drivers/mtd/nand/raw/jz4780_bch.h | 5 +----
> drivers/mtd/nand/raw/jz4780_nand.c | 5 +----
> 3 files changed, 3 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/jz4780_bch.c b/drivers/mtd/nand/raw/jz4780_bch.c
> index 7201827809e9..7e4e5e627603 100644
> --- a/drivers/mtd/nand/raw/jz4780_bch.c
> +++ b/drivers/mtd/nand/raw/jz4780_bch.c
> @@ -1,12 +1,9 @@
> +// SPDX-License-Identifier: GPL-2.0
> /*
> * JZ4780 BCH controller
> *
> * Copyright (c) 2015 Imagination Technologies
> * Author: Alex Smith <alex.smith@imgtec.com>
> - *
> - * This program is free software; you can redistribute it and/or modify it
> - * under the terms of the GNU General Public License version 2 as published
> - * by the Free Software Foundation.
> */
>
> #include <linux/bitops.h>
> diff --git a/drivers/mtd/nand/raw/jz4780_bch.h b/drivers/mtd/nand/raw/jz4780_bch.h
> index bf4718088a3a..451e0c770160 100644
> --- a/drivers/mtd/nand/raw/jz4780_bch.h
> +++ b/drivers/mtd/nand/raw/jz4780_bch.h
> @@ -1,12 +1,9 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> /*
> * JZ4780 BCH controller
> *
> * Copyright (c) 2015 Imagination Technologies
> * Author: Alex Smith <alex.smith@imgtec.com>
> - *
> - * This program is free software; you can redistribute it and/or modify it
> - * under the terms of the GNU General Public License version 2 as published
> - * by the Free Software Foundation.
> */
>
> #ifndef __DRIVERS_MTD_NAND_JZ4780_BCH_H__
> diff --git a/drivers/mtd/nand/raw/jz4780_nand.c b/drivers/mtd/nand/raw/jz4780_nand.c
> index 22e58975f0d5..7f55358b860f 100644
> --- a/drivers/mtd/nand/raw/jz4780_nand.c
> +++ b/drivers/mtd/nand/raw/jz4780_nand.c
> @@ -1,12 +1,9 @@
> +// SPDX-License-Identifier: GPL-2.0
> /*
> * JZ4780 NAND driver
> *
> * Copyright (c) 2015 Imagination Technologies
> * Author: Alex Smith <alex.smith@imgtec.com>
> - *
> - * This program is free software; you can redistribute it and/or modify it
> - * under the terms of the GNU General Public License version 2 as published
> - * by the Free Software Foundation.
> */
>
> #include <linux/delay.h>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 4/8] mtd: rawnand: jz4780: Add support for the JZ4725B
2019-01-18 1:06 ` [PATCH 4/8] mtd: rawnand: jz4780: Add support for the JZ4725B Paul Cercueil
@ 2019-01-18 8:26 ` Boris Brezillon
0 siblings, 0 replies; 17+ messages in thread
From: Boris Brezillon @ 2019-01-18 8:26 UTC (permalink / raw)
To: Paul Cercueil
Cc: David Woodhouse, Brian Norris, Marek Vasut, Richard Weinberger,
Rob Herring, Mark Rutland, Ralf Baechle, Paul Burton,
James Hogan, Miquel Raynal, Harvey Hunt, linux-mtd, devicetree,
linux-kernel, linux-mips
On Thu, 17 Jan 2019 22:06:30 -0300
Paul Cercueil <paul@crapouillou.net> wrote:
> Add support for probing the jz4780-nand driver on the JZ4725B SoC from
> Ingenic.
>
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
BTW, if you have some time, maybe you could convert this driver to
->exec_op() ;-).
> ---
> drivers/mtd/nand/raw/jz4780_nand.c | 39 +++++++++++++++++++++++++++++---------
> 1 file changed, 30 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/jz4780_nand.c b/drivers/mtd/nand/raw/jz4780_nand.c
> index 7f55358b860f..cf24bf12884f 100644
> --- a/drivers/mtd/nand/raw/jz4780_nand.c
> +++ b/drivers/mtd/nand/raw/jz4780_nand.c
> @@ -13,6 +13,7 @@
> #include <linux/module.h>
> #include <linux/of.h>
> #include <linux/of_address.h>
> +#include <linux/of_device.h>
> #include <linux/gpio/consumer.h>
> #include <linux/platform_device.h>
> #include <linux/slab.h>
> @@ -26,13 +27,15 @@
>
> #define DRV_NAME "jz4780-nand"
>
> -#define OFFSET_DATA 0x00000000
> -#define OFFSET_CMD 0x00400000
> -#define OFFSET_ADDR 0x00800000
> -
> /* Command delay when there is no R/B pin. */
> #define RB_DELAY_US 100
>
> +struct jz_soc_info {
> + unsigned long data_offset;
> + unsigned long addr_offset;
> + unsigned long cmd_offset;
> +};
> +
> struct jz4780_nand_cs {
> unsigned int bank;
> void __iomem *base;
> @@ -40,6 +43,7 @@ struct jz4780_nand_cs {
>
> struct jz4780_nand_controller {
> struct device *dev;
> + const struct jz_soc_info *soc_info;
> struct jz4780_bch *bch;
> struct nand_controller controller;
> unsigned int num_banks;
> @@ -101,9 +105,9 @@ static void jz4780_nand_cmd_ctrl(struct nand_chip *chip, int cmd,
> return;
>
> if (ctrl & NAND_ALE)
> - writeb(cmd, cs->base + OFFSET_ADDR);
> + writeb(cmd, cs->base + nfc->soc_info->addr_offset);
> else if (ctrl & NAND_CLE)
> - writeb(cmd, cs->base + OFFSET_CMD);
> + writeb(cmd, cs->base + nfc->soc_info->cmd_offset);
> }
>
> static int jz4780_nand_dev_ready(struct nand_chip *chip)
> @@ -272,8 +276,8 @@ static int jz4780_nand_init_chip(struct platform_device *pdev,
> return -ENOMEM;
> mtd->dev.parent = dev;
>
> - chip->legacy.IO_ADDR_R = cs->base + OFFSET_DATA;
> - chip->legacy.IO_ADDR_W = cs->base + OFFSET_DATA;
> + chip->legacy.IO_ADDR_R = cs->base + nfc->soc_info->data_offset;
> + chip->legacy.IO_ADDR_W = cs->base + nfc->soc_info->data_offset;
> chip->legacy.chip_delay = RB_DELAY_US;
> chip->options = NAND_NO_SUBPAGE_WRITE;
> chip->legacy.select_chip = jz4780_nand_select_chip;
> @@ -353,6 +357,10 @@ static int jz4780_nand_probe(struct platform_device *pdev)
> if (!nfc)
> return -ENOMEM;
>
> + nfc->soc_info = device_get_match_data(dev);
> + if (!nfc->soc_info)
> + return -EINVAL;
> +
> /*
> * Check for BCH HW before we call nand_scan_ident, to prevent us from
> * having to call it again if the BCH driver returns -EPROBE_DEFER.
> @@ -390,8 +398,21 @@ static int jz4780_nand_remove(struct platform_device *pdev)
> return 0;
> }
>
> +static const struct jz_soc_info jz4725b_soc_info = {
> + .data_offset = 0x00000000,
> + .cmd_offset = 0x00008000,
> + .addr_offset = 0x00010000,
> +};
> +
> +static const struct jz_soc_info jz4780_soc_info = {
> + .data_offset = 0x00000000,
> + .cmd_offset = 0x00400000,
> + .addr_offset = 0x00800000,
> +};
> +
> static const struct of_device_id jz4780_nand_dt_match[] = {
> - { .compatible = "ingenic,jz4780-nand" },
> + { .compatible = "ingenic,jz4725b-nand", .data = &jz4725b_soc_info },
> + { .compatible = "ingenic,jz4780-nand", .data = &jz4780_soc_info },
> {},
> };
> MODULE_DEVICE_TABLE(of, jz4780_nand_dt_match);
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 5/8] mtd: rawnand: jz4780: Add ooblayout for the JZ4725B
2019-01-18 1:06 ` [PATCH 5/8] mtd: rawnand: jz4780: Add ooblayout " Paul Cercueil
@ 2019-01-18 8:29 ` Boris Brezillon
0 siblings, 0 replies; 17+ messages in thread
From: Boris Brezillon @ 2019-01-18 8:29 UTC (permalink / raw)
To: Paul Cercueil
Cc: David Woodhouse, Brian Norris, Marek Vasut, Richard Weinberger,
Rob Herring, Mark Rutland, Ralf Baechle, Paul Burton,
James Hogan, Miquel Raynal, Harvey Hunt, linux-mtd, devicetree,
linux-kernel, linux-mips
On Thu, 17 Jan 2019 22:06:31 -0300
Paul Cercueil <paul@crapouillou.net> wrote:
> The boot ROM of the JZ4725B SoC expects a specific OOB layout on the
> NAND, so it makes sense to use this OOB layout unconditionally on this
> SoC.
>
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
> ---
> drivers/mtd/nand/raw/jz4780_nand.c | 40 +++++++++++++++++++++++++++++++++++++-
> 1 file changed, 39 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/raw/jz4780_nand.c b/drivers/mtd/nand/raw/jz4780_nand.c
> index cf24bf12884f..073b3da5c3f7 100644
> --- a/drivers/mtd/nand/raw/jz4780_nand.c
> +++ b/drivers/mtd/nand/raw/jz4780_nand.c
> @@ -34,6 +34,7 @@ struct jz_soc_info {
> unsigned long data_offset;
> unsigned long addr_offset;
> unsigned long cmd_offset;
> + const struct mtd_ooblayout_ops *oob_layout;
> };
>
> struct jz4780_nand_cs {
> @@ -208,7 +209,7 @@ static int jz4780_nand_attach_chip(struct nand_chip *chip)
> return -EINVAL;
> }
>
> - mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops);
> + mtd_set_ooblayout(mtd, nfc->soc_info->oob_layout);
>
> return 0;
> }
> @@ -398,16 +399,53 @@ static int jz4780_nand_remove(struct platform_device *pdev)
> return 0;
> }
>
> +static int jz4725b_ooblayout_ecc(struct mtd_info *mtd, int section,
> + struct mtd_oob_region *oobregion)
> +{
> + struct nand_chip *chip = mtd_to_nand(mtd);
> + struct nand_ecc_ctrl *ecc = &chip->ecc;
> +
> + if (section || !ecc->total)
> + return -ERANGE;
> +
> + oobregion->length = ecc->total;
> + oobregion->offset = 3;
> +
> + return 0;
> +}
> +
> +static int jz4725b_ooblayout_free(struct mtd_info *mtd, int section,
> + struct mtd_oob_region *oobregion)
> +{
> + struct nand_chip *chip = mtd_to_nand(mtd);
> + struct nand_ecc_ctrl *ecc = &chip->ecc;
> +
> + if (section)
> + return -ERANGE;
> +
> + oobregion->length = mtd->oobsize - ecc->total - 3;
> + oobregion->offset = 3 + ecc->total;
> +
> + return 0;
> +}
> +
> +const struct mtd_ooblayout_ops jz4725b_ooblayout_ops = {
> + .ecc = jz4725b_ooblayout_ecc,
> + .free = jz4725b_ooblayout_free,
> +};
> +
> static const struct jz_soc_info jz4725b_soc_info = {
> .data_offset = 0x00000000,
> .cmd_offset = 0x00008000,
> .addr_offset = 0x00010000,
> + .oob_layout = &jz4725b_ooblayout_ops,
> };
>
> static const struct jz_soc_info jz4780_soc_info = {
> .data_offset = 0x00000000,
> .cmd_offset = 0x00400000,
> .addr_offset = 0x00800000,
> + .oob_layout = &nand_ooblayout_lp_ops,
> };
>
> static const struct of_device_id jz4780_nand_dt_match[] = {
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 6/8] mtd: rawnand: jz4780-bch: Don't set clock rate in driver
2019-01-18 1:06 ` [PATCH 6/8] mtd: rawnand: jz4780-bch: Don't set clock rate in driver Paul Cercueil
@ 2019-01-18 8:31 ` Boris Brezillon
0 siblings, 0 replies; 17+ messages in thread
From: Boris Brezillon @ 2019-01-18 8:31 UTC (permalink / raw)
To: Paul Cercueil
Cc: David Woodhouse, Brian Norris, Marek Vasut, Richard Weinberger,
Rob Herring, Mark Rutland, Ralf Baechle, Paul Burton,
James Hogan, Miquel Raynal, Harvey Hunt, linux-mtd, devicetree,
linux-kernel, linux-mips
On Thu, 17 Jan 2019 22:06:32 -0300
Paul Cercueil <paul@crapouillou.net> wrote:
> This should be done in devicetree. Besides, it prevents us from
> supporting other SoCs which don't use the same clock frequency for the
> BCH hardware.
As I said earlier, I disagree with this statement, plus, you're
breaking backward compat with existing DTs when doing that.
>
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> ---
> drivers/mtd/nand/raw/jz4780_bch.c | 4 ----
> 1 file changed, 4 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/jz4780_bch.c b/drivers/mtd/nand/raw/jz4780_bch.c
> index 7e4e5e627603..161d3821e1c4 100644
> --- a/drivers/mtd/nand/raw/jz4780_bch.c
> +++ b/drivers/mtd/nand/raw/jz4780_bch.c
> @@ -57,8 +57,6 @@
> #define BCH_BHINT_UNCOR BIT(1)
> #define BCH_BHINT_ERR BIT(0)
>
> -#define BCH_CLK_RATE (200 * 1000 * 1000)
> -
> /* Timeout for BCH calculation/correction. */
> #define BCH_TIMEOUT_US 100000
>
> @@ -348,8 +346,6 @@ static int jz4780_bch_probe(struct platform_device *pdev)
> return PTR_ERR(bch->clk);
> }
>
> - clk_set_rate(bch->clk, BCH_CLK_RATE);
> -
> mutex_init(&bch->lock);
>
> bch->dev = dev;
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 7/8] mtd: rawnand: jz4780-bch: Separate top-level and SoC specific code
2019-01-18 1:06 ` [PATCH 7/8] mtd: rawnand: jz4780-bch: Separate top-level and SoC specific code Paul Cercueil
@ 2019-01-18 8:35 ` Boris Brezillon
2019-01-18 14:22 ` Paul Cercueil
0 siblings, 1 reply; 17+ messages in thread
From: Boris Brezillon @ 2019-01-18 8:35 UTC (permalink / raw)
To: Paul Cercueil
Cc: David Woodhouse, Brian Norris, Marek Vasut, Richard Weinberger,
Rob Herring, Mark Rutland, Ralf Baechle, Paul Burton,
James Hogan, Miquel Raynal, Harvey Hunt, linux-mtd, devicetree,
linux-kernel, linux-mips
On Thu, 17 Jan 2019 22:06:33 -0300
Paul Cercueil <paul@crapouillou.net> wrote:
> The jz4780-nand driver uses an API provided by the jz4780-bch driver.
> This makes it difficult to support other SoCs in the jz4780-bch driver.
> To work around this, we separate the API functions from the SoC-specific
> code, so that these API functions are SoC-agnostic.
>
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> ---
> drivers/mtd/nand/raw/Makefile | 3 +-
> drivers/mtd/nand/raw/jz4780_bch.c | 173 +++--------------------------
> drivers/mtd/nand/raw/jz4780_bch_common.c | 172 ++++++++++++++++++++++++++++
> drivers/mtd/nand/raw/jz4780_bch_internal.h | 34 ++++++
What's the overhead of having 4725b and 4780 code in the same source
file? If we really need to split that up, I'd prefer to have all jz47xx
sources placed in a subdir (drivers/mtd/nand/raw/jz47xx/).
> 4 files changed, 222 insertions(+), 160 deletions(-)
> create mode 100644 drivers/mtd/nand/raw/jz4780_bch_common.c
> create mode 100644 drivers/mtd/nand/raw/jz4780_bch_internal.h
>
> diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
> index 57159b349054..6dacc9cf38d5 100644
> --- a/drivers/mtd/nand/raw/Makefile
> +++ b/drivers/mtd/nand/raw/Makefile
> @@ -46,7 +46,8 @@ obj-$(CONFIG_MTD_NAND_MPC5121_NFC) += mpc5121_nfc.o
> obj-$(CONFIG_MTD_NAND_VF610_NFC) += vf610_nfc.o
> obj-$(CONFIG_MTD_NAND_RICOH) += r852.o
> obj-$(CONFIG_MTD_NAND_JZ4740) += jz4740_nand.o
> -obj-$(CONFIG_MTD_NAND_JZ4780) += jz4780_nand.o jz4780_bch.o
> +obj-$(CONFIG_MTD_NAND_JZ4780) += jz4780_nand.o jz4780_bch_common.o \
> + jz4780_bch.o
> obj-$(CONFIG_MTD_NAND_GPMI_NAND) += gpmi-nand/
> obj-$(CONFIG_MTD_NAND_XWAY) += xway_nand.o
> obj-$(CONFIG_MTD_NAND_BCM47XXNFLASH) += bcm47xxnflash/
> diff --git a/drivers/mtd/nand/raw/jz4780_bch.c b/drivers/mtd/nand/raw/jz4780_bch.c
> index 161d3821e1c4..1dfc960067b3 100644
> --- a/drivers/mtd/nand/raw/jz4780_bch.c
> +++ b/drivers/mtd/nand/raw/jz4780_bch.c
> @@ -1,25 +1,19 @@
> // SPDX-License-Identifier: GPL-2.0
> /*
> - * JZ4780 BCH controller
> + * JZ4780 backend code for the jz4780-bch driver
> *
> * Copyright (c) 2015 Imagination Technologies
> * Author: Alex Smith <alex.smith@imgtec.com>
> */
>
> #include <linux/bitops.h>
> -#include <linux/clk.h>
> -#include <linux/delay.h>
> -#include <linux/init.h>
> #include <linux/iopoll.h>
> -#include <linux/module.h>
> #include <linux/mutex.h>
> #include <linux/of.h>
> -#include <linux/of_platform.h>
> -#include <linux/platform_device.h>
> -#include <linux/sched.h>
> -#include <linux/slab.h>
> +#include <linux/device.h>
>
> #include "jz4780_bch.h"
> +#include "jz4780_bch_internal.h"
>
> #define BCH_BHCR 0x0
> #define BCH_BHCCR 0x8
> @@ -60,13 +54,6 @@
> /* Timeout for BCH calculation/correction. */
> #define BCH_TIMEOUT_US 100000
>
> -struct jz4780_bch {
> - struct device *dev;
> - void __iomem *base;
> - struct clk *clk;
> - struct mutex lock;
> -};
> -
> static void jz4780_bch_init(struct jz4780_bch *bch,
> struct jz4780_bch_params *params, bool encode)
> {
> @@ -165,18 +152,9 @@ static bool jz4780_bch_wait_complete(struct jz4780_bch *bch, unsigned int irq,
> return true;
> }
>
> -/**
> - * jz4780_bch_calculate() - calculate ECC for a data buffer
> - * @bch: BCH device.
> - * @params: BCH parameters.
> - * @buf: input buffer with raw data.
> - * @ecc_code: output buffer with ECC.
> - *
> - * Return: 0 on success, -ETIMEDOUT if timed out while waiting for BCH
> - * controller.
> - */
> -int jz4780_bch_calculate(struct jz4780_bch *bch, struct jz4780_bch_params *params,
> - const u8 *buf, u8 *ecc_code)
> +static int jz4780_calculate(struct jz4780_bch *bch,
> + struct jz4780_bch_params *params,
> + const u8 *buf, u8 *ecc_code)
> {
> int ret = 0;
>
> @@ -195,23 +173,10 @@ int jz4780_bch_calculate(struct jz4780_bch *bch, struct jz4780_bch_params *param
> mutex_unlock(&bch->lock);
> return ret;
> }
> -EXPORT_SYMBOL(jz4780_bch_calculate);
> -
> -/**
> - * jz4780_bch_correct() - detect and correct bit errors
> - * @bch: BCH device.
> - * @params: BCH parameters.
> - * @buf: raw data read from the chip.
> - * @ecc_code: ECC read from the chip.
> - *
> - * Given the raw data and the ECC read from the NAND device, detects and
> - * corrects errors in the data.
> - *
> - * Return: the number of bit errors corrected, -EBADMSG if there are too many
> - * errors to correct or -ETIMEDOUT if we timed out waiting for the controller.
> - */
> -int jz4780_bch_correct(struct jz4780_bch *bch, struct jz4780_bch_params *params,
> - u8 *buf, u8 *ecc_code)
> +
> +static int jz4780_correct(struct jz4780_bch *bch,
> + struct jz4780_bch_params *params,
> + u8 *buf, u8 *ecc_code)
> {
> u32 reg, mask, index;
> int i, ret, count;
> @@ -257,119 +222,9 @@ int jz4780_bch_correct(struct jz4780_bch *bch, struct jz4780_bch_params *params,
> mutex_unlock(&bch->lock);
> return ret;
> }
> -EXPORT_SYMBOL(jz4780_bch_correct);
> -
> -/**
> - * jz4780_bch_get() - get the BCH controller device
> - * @np: BCH device tree node.
> - *
> - * Gets the BCH controller device from the specified device tree node. The
> - * device must be released with jz4780_bch_release() when it is no longer being
> - * used.
> - *
> - * Return: a pointer to jz4780_bch, errors are encoded into the pointer.
> - * PTR_ERR(-EPROBE_DEFER) if the device hasn't been initialised yet.
> - */
> -static struct jz4780_bch *jz4780_bch_get(struct device_node *np)
> -{
> - struct platform_device *pdev;
> - struct jz4780_bch *bch;
> -
> - pdev = of_find_device_by_node(np);
> - if (!pdev || !platform_get_drvdata(pdev))
> - return ERR_PTR(-EPROBE_DEFER);
> -
> - get_device(&pdev->dev);
> -
> - bch = platform_get_drvdata(pdev);
> - clk_prepare_enable(bch->clk);
> -
> - return bch;
> -}
> -
> -/**
> - * of_jz4780_bch_get() - get the BCH controller from a DT node
> - * @of_node: the node that contains a bch-controller property.
> - *
> - * Get the bch-controller property from the given device tree
> - * node and pass it to jz4780_bch_get to do the work.
> - *
> - * Return: a pointer to jz4780_bch, errors are encoded into the pointer.
> - * PTR_ERR(-EPROBE_DEFER) if the device hasn't been initialised yet.
> - */
> -struct jz4780_bch *of_jz4780_bch_get(struct device_node *of_node)
> -{
> - struct jz4780_bch *bch = NULL;
> - struct device_node *np;
>
> - np = of_parse_phandle(of_node, "ingenic,bch-controller", 0);
> -
> - if (np) {
> - bch = jz4780_bch_get(np);
> - of_node_put(np);
> - }
> - return bch;
> -}
> -EXPORT_SYMBOL(of_jz4780_bch_get);
> -
> -/**
> - * jz4780_bch_release() - release the BCH controller device
> - * @bch: BCH device.
> - */
> -void jz4780_bch_release(struct jz4780_bch *bch)
> -{
> - clk_disable_unprepare(bch->clk);
> - put_device(bch->dev);
> -}
> -EXPORT_SYMBOL(jz4780_bch_release);
> -
> -static int jz4780_bch_probe(struct platform_device *pdev)
> -{
> - struct device *dev = &pdev->dev;
> - struct jz4780_bch *bch;
> - struct resource *res;
> -
> - bch = devm_kzalloc(dev, sizeof(*bch), GFP_KERNEL);
> - if (!bch)
> - return -ENOMEM;
> -
> - res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> - bch->base = devm_ioremap_resource(dev, res);
> - if (IS_ERR(bch->base))
> - return PTR_ERR(bch->base);
> -
> - jz4780_bch_disable(bch);
> -
> - bch->clk = devm_clk_get(dev, NULL);
> - if (IS_ERR(bch->clk)) {
> - dev_err(dev, "failed to get clock: %ld\n", PTR_ERR(bch->clk));
> - return PTR_ERR(bch->clk);
> - }
> -
> - mutex_init(&bch->lock);
> -
> - bch->dev = dev;
> - platform_set_drvdata(pdev, bch);
> -
> - return 0;
> -}
> -
> -static const struct of_device_id jz4780_bch_dt_match[] = {
> - { .compatible = "ingenic,jz4780-bch" },
> - {},
> +const struct jz4780_bch_ops jz4780_bch_jz4780_ops = {
> + .disable = jz4780_bch_disable,
> + .calculate = jz4780_calculate,
> + .correct = jz4780_correct,
> };
> -MODULE_DEVICE_TABLE(of, jz4780_bch_dt_match);
> -
> -static struct platform_driver jz4780_bch_driver = {
> - .probe = jz4780_bch_probe,
> - .driver = {
> - .name = "jz4780-bch",
> - .of_match_table = of_match_ptr(jz4780_bch_dt_match),
> - },
> -};
> -module_platform_driver(jz4780_bch_driver);
> -
> -MODULE_AUTHOR("Alex Smith <alex@alex-smith.me.uk>");
> -MODULE_AUTHOR("Harvey Hunt <harveyhuntnexus@gmail.com>");
> -MODULE_DESCRIPTION("Ingenic JZ4780 BCH error correction driver");
> -MODULE_LICENSE("GPL v2");
> diff --git a/drivers/mtd/nand/raw/jz4780_bch_common.c b/drivers/mtd/nand/raw/jz4780_bch_common.c
> new file mode 100644
> index 000000000000..573b079e6cbe
> --- /dev/null
> +++ b/drivers/mtd/nand/raw/jz4780_bch_common.c
> @@ -0,0 +1,172 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * JZ4780 BCH controller
> + *
> + * Copyright (c) 2015 Imagination Technologies
> + * Author: Alex Smith <alex.smith@imgtec.com>
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/init.h>
> +#include <linux/module.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +
> +#include "jz4780_bch_internal.h"
> +#include "jz4780_bch.h"
> +
> +/**
> + * jz4780_bch_calculate() - calculate ECC for a data buffer
> + * @bch: BCH device.
> + * @params: BCH parameters.
> + * @buf: input buffer with raw data.
> + * @ecc_code: output buffer with ECC.
> + *
> + * Return: 0 on success, -ETIMEDOUT if timed out while waiting for BCH
> + * controller.
> + */
> +int jz4780_bch_calculate(struct jz4780_bch *bch, struct jz4780_bch_params *params,
> + const u8 *buf, u8 *ecc_code)
> +{
> + return bch->ops->calculate(bch, params, buf, ecc_code);
> +}
> +EXPORT_SYMBOL(jz4780_bch_calculate);
> +
> +/**
> + * jz4780_bch_correct() - detect and correct bit errors
> + * @bch: BCH device.
> + * @params: BCH parameters.
> + * @buf: raw data read from the chip.
> + * @ecc_code: ECC read from the chip.
> + *
> + * Given the raw data and the ECC read from the NAND device, detects and
> + * corrects errors in the data.
> + *
> + * Return: the number of bit errors corrected, -EBADMSG if there are too many
> + * errors to correct or -ETIMEDOUT if we timed out waiting for the controller.
> + */
> +int jz4780_bch_correct(struct jz4780_bch *bch, struct jz4780_bch_params *params,
> + u8 *buf, u8 *ecc_code)
> +{
> + return bch->ops->correct(bch, params, buf, ecc_code);
> +}
> +EXPORT_SYMBOL(jz4780_bch_correct);
> +
> +/**
> + * jz4780_bch_get() - get the BCH controller device
> + * @np: BCH device tree node.
> + *
> + * Gets the BCH controller device from the specified device tree node. The
> + * device must be released with jz4780_bch_release() when it is no longer being
> + * used.
> + *
> + * Return: a pointer to jz4780_bch, errors are encoded into the pointer.
> + * PTR_ERR(-EPROBE_DEFER) if the device hasn't been initialised yet.
> + */
> +static struct jz4780_bch *jz4780_bch_get(struct device_node *np)
> +{
> + struct platform_device *pdev;
> + struct jz4780_bch *bch;
> +
> + pdev = of_find_device_by_node(np);
> + if (!pdev || !platform_get_drvdata(pdev))
> + return ERR_PTR(-EPROBE_DEFER);
> +
> + get_device(&pdev->dev);
> +
> + bch = platform_get_drvdata(pdev);
> + clk_prepare_enable(bch->clk);
> +
> + return bch;
> +}
> +
> +/**
> + * of_jz4780_bch_get() - get the BCH controller from a DT node
> + * @of_node: the node that contains a bch-controller property.
> + *
> + * Get the bch-controller property from the given device tree
> + * node and pass it to jz4780_bch_get to do the work.
> + *
> + * Return: a pointer to jz4780_bch, errors are encoded into the pointer.
> + * PTR_ERR(-EPROBE_DEFER) if the device hasn't been initialised yet.
> + */
> +struct jz4780_bch *of_jz4780_bch_get(struct device_node *of_node)
> +{
> + struct jz4780_bch *bch = NULL;
> + struct device_node *np;
> +
> + np = of_parse_phandle(of_node, "ingenic,bch-controller", 0);
> +
> + if (np) {
> + bch = jz4780_bch_get(np);
> + of_node_put(np);
> + }
> + return bch;
> +}
> +EXPORT_SYMBOL(of_jz4780_bch_get);
> +
> +/**
> + * jz4780_bch_release() - release the BCH controller device
> + * @bch: BCH device.
> + */
> +void jz4780_bch_release(struct jz4780_bch *bch)
> +{
> + clk_disable_unprepare(bch->clk);
> + put_device(bch->dev);
> +}
> +EXPORT_SYMBOL(jz4780_bch_release);
> +
> +static int jz4780_bch_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct jz4780_bch *bch;
> + struct resource *res;
> +
> + bch = devm_kzalloc(dev, sizeof(*bch), GFP_KERNEL);
> + if (!bch)
> + return -ENOMEM;
> +
> + bch->ops = device_get_match_data(dev);
> + if (!bch->ops)
> + return -EINVAL;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + bch->base = devm_ioremap_resource(dev, res);
> + if (IS_ERR(bch->base))
> + return PTR_ERR(bch->base);
> +
> + bch->ops->disable(bch);
> +
> + bch->clk = devm_clk_get(dev, NULL);
> + if (IS_ERR(bch->clk)) {
> + dev_err(dev, "failed to get clock: %ld\n", PTR_ERR(bch->clk));
> + return PTR_ERR(bch->clk);
> + }
> +
> + mutex_init(&bch->lock);
> +
> + bch->dev = dev;
> + platform_set_drvdata(pdev, bch);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id jz4780_bch_dt_match[] = {
> + { .compatible = "ingenic,jz4780-bch", .data = &jz4780_bch_jz4780_ops },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, jz4780_bch_dt_match);
> +
> +static struct platform_driver jz4780_bch_driver = {
> + .probe = jz4780_bch_probe,
> + .driver = {
> + .name = "jz4780-bch",
> + .of_match_table = of_match_ptr(jz4780_bch_dt_match),
> + },
> +};
> +module_platform_driver(jz4780_bch_driver);
> +
> +MODULE_AUTHOR("Alex Smith <alex@alex-smith.me.uk>");
> +MODULE_AUTHOR("Harvey Hunt <harveyhuntnexus@gmail.com>");
> +MODULE_DESCRIPTION("Ingenic JZ4780 BCH error correction driver");
> +MODULE_LICENSE("GPL v2");
> diff --git a/drivers/mtd/nand/raw/jz4780_bch_internal.h b/drivers/mtd/nand/raw/jz4780_bch_internal.h
> new file mode 100644
> index 000000000000..7162e4f872f4
> --- /dev/null
> +++ b/drivers/mtd/nand/raw/jz4780_bch_internal.h
> @@ -0,0 +1,34 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef __DRIVERS_MTD_NAND_JZ4780_BCH_INTERNAL_H__
> +#define __DRIVERS_MTD_NAND_JZ4780_BCH_INTERNAL_H__
> +
> +#include <linux/compiler_types.h>
> +#include <linux/mutex.h>
> +#include <linux/types.h>
> +
> +struct jz4780_bch_params;
> +struct jz4780_bch;
> +struct device;
> +struct clk;
> +
> +struct jz4780_bch_ops {
> + void (*disable)(struct jz4780_bch *bch);
> + int (*calculate)(struct jz4780_bch *bch,
> + struct jz4780_bch_params *params,
> + const u8 *buf, u8 *ecc_code);
> + int (*correct)(struct jz4780_bch *bch,
> + struct jz4780_bch_params *params,
> + u8 *buf, u8 *ecc_code);
> +};
> +
> +struct jz4780_bch {
> + struct device *dev;
> + const struct jz4780_bch_ops *ops;
> + void __iomem *base;
> + struct clk *clk;
> + struct mutex lock;
> +};
> +
> +extern const struct jz4780_bch_ops jz4780_bch_jz4780_ops;
> +
> +#endif /* __DRIVERS_MTD_NAND_JZ4780_BCH_INTERNAL_H__ */
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz
2019-01-18 8:07 ` [PATCH 1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz Boris Brezillon
@ 2019-01-18 14:15 ` Paul Cercueil
0 siblings, 0 replies; 17+ messages in thread
From: Paul Cercueil @ 2019-01-18 14:15 UTC (permalink / raw)
To: Boris Brezillon
Cc: David Woodhouse, Brian Norris, Marek Vasut, Richard Weinberger,
Rob Herring, Mark Rutland, Ralf Baechle, Paul Burton,
James Hogan, Miquel Raynal, Harvey Hunt, linux-mtd, devicetree,
linux-kernel, linux-mips
Hi,
On Fri, Jan 18, 2019 at 5:07 AM, Boris Brezillon
<bbrezillon@kernel.org> wrote:
> Hi Paul,
>
> On Thu, 17 Jan 2019 22:06:27 -0300
> Paul Cercueil <paul@crapouillou.net <mailto:paul@crapouillou.net>>
> wrote:
>
>> This is currently done inside the jz4780-bch driver, but it really
>> should be done here instead.
>>
>
> I disagree with that statement. If it's a per-SoC constraint then you
> can select the appropriate rate based on the compatible in the driver.
> If the clock rate depends on the NAND chip it probably means it's used
> to generate the RE/WE pulse and should depend on the NAND timings
> passed to ->setup_data_interface(). In either case, this should not be
> specified in the DT.
Alright, I'll drop the patch.
> Regards,
>
> Boris
>
>> Signed-off-by: Paul Cercueil <paul@crapouillou.net
>> <mailto:paul@crapouillou.net>>
>> ---
>> arch/mips/boot/dts/ingenic/ci20.dts | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/arch/mips/boot/dts/ingenic/ci20.dts
>> b/arch/mips/boot/dts/ingenic/ci20.dts
>> index 50cff3cbcc6d..aa892ec54d0a 100644
>> --- a/arch/mips/boot/dts/ingenic/ci20.dts
>> +++ b/arch/mips/boot/dts/ingenic/ci20.dts
>> @@ -111,6 +111,9 @@
>> pinctrl-names = "default";
>> pinctrl-0 = <&pins_nemc>;
>>
>> + assigned-clocks = <&cgu JZ4780_CLK_BCH>;
>> + assigned-clock-rates = <200000000>;
>> +
>> nand@1 {
>> reg = <1>;
>>
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 7/8] mtd: rawnand: jz4780-bch: Separate top-level and SoC specific code
2019-01-18 8:35 ` Boris Brezillon
@ 2019-01-18 14:22 ` Paul Cercueil
0 siblings, 0 replies; 17+ messages in thread
From: Paul Cercueil @ 2019-01-18 14:22 UTC (permalink / raw)
To: Boris Brezillon
Cc: David Woodhouse, Brian Norris, Marek Vasut, Richard Weinberger,
Rob Herring, Mark Rutland, Ralf Baechle, Paul Burton,
James Hogan, Miquel Raynal, Harvey Hunt, linux-mtd, devicetree,
linux-kernel, linux-mips
Hi,
On Fri, Jan 18, 2019 at 5:35 AM, Boris Brezillon
<bbrezillon@kernel.org> wrote:
> On Thu, 17 Jan 2019 22:06:33 -0300
> Paul Cercueil <paul@crapouillou.net <mailto:paul@crapouillou.net>>
> wrote:
>
>> The jz4780-nand driver uses an API provided by the jz4780-bch
>> driver.
>> This makes it difficult to support other SoCs in the jz4780-bch
>> driver.
>> To work around this, we separate the API functions from the
>> SoC-specific
>> code, so that these API functions are SoC-agnostic.
>>
>> Signed-off-by: Paul Cercueil <paul@crapouillou.net
>> <mailto:paul@crapouillou.net>>
>> ---
>> drivers/mtd/nand/raw/Makefile | 3 +-
>> drivers/mtd/nand/raw/jz4780_bch.c | 173
>> +++--------------------------
>> drivers/mtd/nand/raw/jz4780_bch_common.c | 172
>> ++++++++++++++++++++++++++++
>> drivers/mtd/nand/raw/jz4780_bch_internal.h | 34 ++++++
>
> What's the overhead of having 4725b and 4780 code in the same source
> file? If we really need to split that up, I'd prefer to have all
> jz47xx
> sources placed in a subdir (drivers/mtd/nand/raw/jz47xx/).
It's complicated, the hardware changed a lot between the two SoC
revisions,
to the point where it's not really possible to support the two within
one
single driver. The registers are different, the behaviour is different,
etc.
>> 4 files changed, 222 insertions(+), 160 deletions(-)
>> create mode 100644 drivers/mtd/nand/raw/jz4780_bch_common.c
>> create mode 100644 drivers/mtd/nand/raw/jz4780_bch_internal.h
>>
>> diff --git a/drivers/mtd/nand/raw/Makefile
>> b/drivers/mtd/nand/raw/Makefile
>> index 57159b349054..6dacc9cf38d5 100644
>> --- a/drivers/mtd/nand/raw/Makefile
>> +++ b/drivers/mtd/nand/raw/Makefile
>> @@ -46,7 +46,8 @@ obj-$(CONFIG_MTD_NAND_MPC5121_NFC) +=
>> mpc5121_nfc.o
>> obj-$(CONFIG_MTD_NAND_VF610_NFC) += vf610_nfc.o
>> obj-$(CONFIG_MTD_NAND_RICOH) += r852.o
>> obj-$(CONFIG_MTD_NAND_JZ4740) += jz4740_nand.o
>> -obj-$(CONFIG_MTD_NAND_JZ4780) += jz4780_nand.o jz4780_bch.o
>> +obj-$(CONFIG_MTD_NAND_JZ4780) += jz4780_nand.o
>> jz4780_bch_common.o \
>> + jz4780_bch.o
>> obj-$(CONFIG_MTD_NAND_GPMI_NAND) += gpmi-nand/
>> obj-$(CONFIG_MTD_NAND_XWAY) += xway_nand.o
>> obj-$(CONFIG_MTD_NAND_BCM47XXNFLASH) += bcm47xxnflash/
>> diff --git a/drivers/mtd/nand/raw/jz4780_bch.c
>> b/drivers/mtd/nand/raw/jz4780_bch.c
>> index 161d3821e1c4..1dfc960067b3 100644
>> --- a/drivers/mtd/nand/raw/jz4780_bch.c
>> +++ b/drivers/mtd/nand/raw/jz4780_bch.c
>> @@ -1,25 +1,19 @@
>> // SPDX-License-Identifier: GPL-2.0
>> /*
>> - * JZ4780 BCH controller
>> + * JZ4780 backend code for the jz4780-bch driver
>> *
>> * Copyright (c) 2015 Imagination Technologies
>> * Author: Alex Smith <alex.smith@imgtec.com
>> <mailto:alex.smith@imgtec.com>>
>> */
>>
>> #include <linux/bitops.h>
>> -#include <linux/clk.h>
>> -#include <linux/delay.h>
>> -#include <linux/init.h>
>> #include <linux/iopoll.h>
>> -#include <linux/module.h>
>> #include <linux/mutex.h>
>> #include <linux/of.h>
>> -#include <linux/of_platform.h>
>> -#include <linux/platform_device.h>
>> -#include <linux/sched.h>
>> -#include <linux/slab.h>
>> +#include <linux/device.h>
>>
>> #include "jz4780_bch.h"
>> +#include "jz4780_bch_internal.h"
>>
>> #define BCH_BHCR 0x0
>> #define BCH_BHCCR 0x8
>> @@ -60,13 +54,6 @@
>> /* Timeout for BCH calculation/correction. */
>> #define BCH_TIMEOUT_US 100000
>>
>> -struct jz4780_bch {
>> - struct device *dev;
>> - void __iomem *base;
>> - struct clk *clk;
>> - struct mutex lock;
>> -};
>> -
>> static void jz4780_bch_init(struct jz4780_bch *bch,
>> struct jz4780_bch_params *params, bool encode)
>> {
>> @@ -165,18 +152,9 @@ static bool jz4780_bch_wait_complete(struct
>> jz4780_bch *bch, unsigned int irq,
>> return true;
>> }
>>
>> -/**
>> - * jz4780_bch_calculate() - calculate ECC for a data buffer
>> - * @bch: BCH device.
>> - * @params: BCH parameters.
>> - * @buf: input buffer with raw data.
>> - * @ecc_code: output buffer with ECC.
>> - *
>> - * Return: 0 on success, -ETIMEDOUT if timed out while waiting for
>> BCH
>> - * controller.
>> - */
>> -int jz4780_bch_calculate(struct jz4780_bch *bch, struct
>> jz4780_bch_params *params,
>> - const u8 *buf, u8 *ecc_code)
>> +static int jz4780_calculate(struct jz4780_bch *bch,
>> + struct jz4780_bch_params *params,
>> + const u8 *buf, u8 *ecc_code)
>> {
>> int ret = 0;
>>
>> @@ -195,23 +173,10 @@ int jz4780_bch_calculate(struct jz4780_bch
>> *bch, struct jz4780_bch_params *param
>> mutex_unlock(&bch->lock);
>> return ret;
>> }
>> -EXPORT_SYMBOL(jz4780_bch_calculate);
>> -
>> -/**
>> - * jz4780_bch_correct() - detect and correct bit errors
>> - * @bch: BCH device.
>> - * @params: BCH parameters.
>> - * @buf: raw data read from the chip.
>> - * @ecc_code: ECC read from the chip.
>> - *
>> - * Given the raw data and the ECC read from the NAND device,
>> detects and
>> - * corrects errors in the data.
>> - *
>> - * Return: the number of bit errors corrected, -EBADMSG if there
>> are too many
>> - * errors to correct or -ETIMEDOUT if we timed out waiting for the
>> controller.
>> - */
>> -int jz4780_bch_correct(struct jz4780_bch *bch, struct
>> jz4780_bch_params *params,
>> - u8 *buf, u8 *ecc_code)
>> +
>> +static int jz4780_correct(struct jz4780_bch *bch,
>> + struct jz4780_bch_params *params,
>> + u8 *buf, u8 *ecc_code)
>> {
>> u32 reg, mask, index;
>> int i, ret, count;
>> @@ -257,119 +222,9 @@ int jz4780_bch_correct(struct jz4780_bch
>> *bch, struct jz4780_bch_params *params,
>> mutex_unlock(&bch->lock);
>> return ret;
>> }
>> -EXPORT_SYMBOL(jz4780_bch_correct);
>> -
>> -/**
>> - * jz4780_bch_get() - get the BCH controller device
>> - * @np: BCH device tree node.
>> - *
>> - * Gets the BCH controller device from the specified device tree
>> node. The
>> - * device must be released with jz4780_bch_release() when it is no
>> longer being
>> - * used.
>> - *
>> - * Return: a pointer to jz4780_bch, errors are encoded into the
>> pointer.
>> - * PTR_ERR(-EPROBE_DEFER) if the device hasn't been initialised
>> yet.
>> - */
>> -static struct jz4780_bch *jz4780_bch_get(struct device_node *np)
>> -{
>> - struct platform_device *pdev;
>> - struct jz4780_bch *bch;
>> -
>> - pdev = of_find_device_by_node(np);
>> - if (!pdev || !platform_get_drvdata(pdev))
>> - return ERR_PTR(-EPROBE_DEFER);
>> -
>> - get_device(&pdev->dev);
>> -
>> - bch = platform_get_drvdata(pdev);
>> - clk_prepare_enable(bch->clk);
>> -
>> - return bch;
>> -}
>> -
>> -/**
>> - * of_jz4780_bch_get() - get the BCH controller from a DT node
>> - * @of_node: the node that contains a bch-controller property.
>> - *
>> - * Get the bch-controller property from the given device tree
>> - * node and pass it to jz4780_bch_get to do the work.
>> - *
>> - * Return: a pointer to jz4780_bch, errors are encoded into the
>> pointer.
>> - * PTR_ERR(-EPROBE_DEFER) if the device hasn't been initialised
>> yet.
>> - */
>> -struct jz4780_bch *of_jz4780_bch_get(struct device_node *of_node)
>> -{
>> - struct jz4780_bch *bch = NULL;
>> - struct device_node *np;
>>
>> - np = of_parse_phandle(of_node, "ingenic,bch-controller", 0);
>> -
>> - if (np) {
>> - bch = jz4780_bch_get(np);
>> - of_node_put(np);
>> - }
>> - return bch;
>> -}
>> -EXPORT_SYMBOL(of_jz4780_bch_get);
>> -
>> -/**
>> - * jz4780_bch_release() - release the BCH controller device
>> - * @bch: BCH device.
>> - */
>> -void jz4780_bch_release(struct jz4780_bch *bch)
>> -{
>> - clk_disable_unprepare(bch->clk);
>> - put_device(bch->dev);
>> -}
>> -EXPORT_SYMBOL(jz4780_bch_release);
>> -
>> -static int jz4780_bch_probe(struct platform_device *pdev)
>> -{
>> - struct device *dev = &pdev->dev;
>> - struct jz4780_bch *bch;
>> - struct resource *res;
>> -
>> - bch = devm_kzalloc(dev, sizeof(*bch), GFP_KERNEL);
>> - if (!bch)
>> - return -ENOMEM;
>> -
>> - res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> - bch->base = devm_ioremap_resource(dev, res);
>> - if (IS_ERR(bch->base))
>> - return PTR_ERR(bch->base);
>> -
>> - jz4780_bch_disable(bch);
>> -
>> - bch->clk = devm_clk_get(dev, NULL);
>> - if (IS_ERR(bch->clk)) {
>> - dev_err(dev, "failed to get clock: %ld\n", PTR_ERR(bch->clk));
>> - return PTR_ERR(bch->clk);
>> - }
>> -
>> - mutex_init(&bch->lock);
>> -
>> - bch->dev = dev;
>> - platform_set_drvdata(pdev, bch);
>> -
>> - return 0;
>> -}
>> -
>> -static const struct of_device_id jz4780_bch_dt_match[] = {
>> - { .compatible = "ingenic,jz4780-bch" },
>> - {},
>> +const struct jz4780_bch_ops jz4780_bch_jz4780_ops = {
>> + .disable = jz4780_bch_disable,
>> + .calculate = jz4780_calculate,
>> + .correct = jz4780_correct,
>> };
>> -MODULE_DEVICE_TABLE(of, jz4780_bch_dt_match);
>> -
>> -static struct platform_driver jz4780_bch_driver = {
>> - .probe = jz4780_bch_probe,
>> - .driver = {
>> - .name = "jz4780-bch",
>> - .of_match_table = of_match_ptr(jz4780_bch_dt_match),
>> - },
>> -};
>> -module_platform_driver(jz4780_bch_driver);
>> -
>> -MODULE_AUTHOR("Alex Smith <alex@alex-smith.me.uk
>> <mailto:alex@alex-smith.me.uk>>");
>> -MODULE_AUTHOR("Harvey Hunt <harveyhuntnexus@gmail.com
>> <mailto:harveyhuntnexus@gmail.com>>");
>> -MODULE_DESCRIPTION("Ingenic JZ4780 BCH error correction driver");
>> -MODULE_LICENSE("GPL v2");
>> diff --git a/drivers/mtd/nand/raw/jz4780_bch_common.c
>> b/drivers/mtd/nand/raw/jz4780_bch_common.c
>> new file mode 100644
>> index 000000000000..573b079e6cbe
>> --- /dev/null
>> +++ b/drivers/mtd/nand/raw/jz4780_bch_common.c
>> @@ -0,0 +1,172 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * JZ4780 BCH controller
>> + *
>> + * Copyright (c) 2015 Imagination Technologies
>> + * Author: Alex Smith <alex.smith@imgtec.com
>> <mailto:alex.smith@imgtec.com>>
>> + */
>> +
>> +#include <linux/clk.h>
>> +#include <linux/init.h>
>> +#include <linux/module.h>
>> +#include <linux/of_platform.h>
>> +#include <linux/platform_device.h>
>> +
>> +#include "jz4780_bch_internal.h"
>> +#include "jz4780_bch.h"
>> +
>> +/**
>> + * jz4780_bch_calculate() - calculate ECC for a data buffer
>> + * @bch: BCH device.
>> + * @params: BCH parameters.
>> + * @buf: input buffer with raw data.
>> + * @ecc_code: output buffer with ECC.
>> + *
>> + * Return: 0 on success, -ETIMEDOUT if timed out while waiting for
>> BCH
>> + * controller.
>> + */
>> +int jz4780_bch_calculate(struct jz4780_bch *bch, struct
>> jz4780_bch_params *params,
>> + const u8 *buf, u8 *ecc_code)
>> +{
>> + return bch->ops->calculate(bch, params, buf, ecc_code);
>> +}
>> +EXPORT_SYMBOL(jz4780_bch_calculate);
>> +
>> +/**
>> + * jz4780_bch_correct() - detect and correct bit errors
>> + * @bch: BCH device.
>> + * @params: BCH parameters.
>> + * @buf: raw data read from the chip.
>> + * @ecc_code: ECC read from the chip.
>> + *
>> + * Given the raw data and the ECC read from the NAND device,
>> detects and
>> + * corrects errors in the data.
>> + *
>> + * Return: the number of bit errors corrected, -EBADMSG if there
>> are too many
>> + * errors to correct or -ETIMEDOUT if we timed out waiting for the
>> controller.
>> + */
>> +int jz4780_bch_correct(struct jz4780_bch *bch, struct
>> jz4780_bch_params *params,
>> + u8 *buf, u8 *ecc_code)
>> +{
>> + return bch->ops->correct(bch, params, buf, ecc_code);
>> +}
>> +EXPORT_SYMBOL(jz4780_bch_correct);
>> +
>> +/**
>> + * jz4780_bch_get() - get the BCH controller device
>> + * @np: BCH device tree node.
>> + *
>> + * Gets the BCH controller device from the specified device tree
>> node. The
>> + * device must be released with jz4780_bch_release() when it is no
>> longer being
>> + * used.
>> + *
>> + * Return: a pointer to jz4780_bch, errors are encoded into the
>> pointer.
>> + * PTR_ERR(-EPROBE_DEFER) if the device hasn't been initialised
>> yet.
>> + */
>> +static struct jz4780_bch *jz4780_bch_get(struct device_node *np)
>> +{
>> + struct platform_device *pdev;
>> + struct jz4780_bch *bch;
>> +
>> + pdev = of_find_device_by_node(np);
>> + if (!pdev || !platform_get_drvdata(pdev))
>> + return ERR_PTR(-EPROBE_DEFER);
>> +
>> + get_device(&pdev->dev);
>> +
>> + bch = platform_get_drvdata(pdev);
>> + clk_prepare_enable(bch->clk);
>> +
>> + return bch;
>> +}
>> +
>> +/**
>> + * of_jz4780_bch_get() - get the BCH controller from a DT node
>> + * @of_node: the node that contains a bch-controller property.
>> + *
>> + * Get the bch-controller property from the given device tree
>> + * node and pass it to jz4780_bch_get to do the work.
>> + *
>> + * Return: a pointer to jz4780_bch, errors are encoded into the
>> pointer.
>> + * PTR_ERR(-EPROBE_DEFER) if the device hasn't been initialised
>> yet.
>> + */
>> +struct jz4780_bch *of_jz4780_bch_get(struct device_node *of_node)
>> +{
>> + struct jz4780_bch *bch = NULL;
>> + struct device_node *np;
>> +
>> + np = of_parse_phandle(of_node, "ingenic,bch-controller", 0);
>> +
>> + if (np) {
>> + bch = jz4780_bch_get(np);
>> + of_node_put(np);
>> + }
>> + return bch;
>> +}
>> +EXPORT_SYMBOL(of_jz4780_bch_get);
>> +
>> +/**
>> + * jz4780_bch_release() - release the BCH controller device
>> + * @bch: BCH device.
>> + */
>> +void jz4780_bch_release(struct jz4780_bch *bch)
>> +{
>> + clk_disable_unprepare(bch->clk);
>> + put_device(bch->dev);
>> +}
>> +EXPORT_SYMBOL(jz4780_bch_release);
>> +
>> +static int jz4780_bch_probe(struct platform_device *pdev)
>> +{
>> + struct device *dev = &pdev->dev;
>> + struct jz4780_bch *bch;
>> + struct resource *res;
>> +
>> + bch = devm_kzalloc(dev, sizeof(*bch), GFP_KERNEL);
>> + if (!bch)
>> + return -ENOMEM;
>> +
>> + bch->ops = device_get_match_data(dev);
>> + if (!bch->ops)
>> + return -EINVAL;
>> +
>> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + bch->base = devm_ioremap_resource(dev, res);
>> + if (IS_ERR(bch->base))
>> + return PTR_ERR(bch->base);
>> +
>> + bch->ops->disable(bch);
>> +
>> + bch->clk = devm_clk_get(dev, NULL);
>> + if (IS_ERR(bch->clk)) {
>> + dev_err(dev, "failed to get clock: %ld\n", PTR_ERR(bch->clk));
>> + return PTR_ERR(bch->clk);
>> + }
>> +
>> + mutex_init(&bch->lock);
>> +
>> + bch->dev = dev;
>> + platform_set_drvdata(pdev, bch);
>> +
>> + return 0;
>> +}
>> +
>> +static const struct of_device_id jz4780_bch_dt_match[] = {
>> + { .compatible = "ingenic,jz4780-bch", .data =
>> &jz4780_bch_jz4780_ops },
>> + {},
>> +};
>> +MODULE_DEVICE_TABLE(of, jz4780_bch_dt_match);
>> +
>> +static struct platform_driver jz4780_bch_driver = {
>> + .probe = jz4780_bch_probe,
>> + .driver = {
>> + .name = "jz4780-bch",
>> + .of_match_table = of_match_ptr(jz4780_bch_dt_match),
>> + },
>> +};
>> +module_platform_driver(jz4780_bch_driver);
>> +
>> +MODULE_AUTHOR("Alex Smith <alex@alex-smith.me.uk
>> <mailto:alex@alex-smith.me.uk>>");
>> +MODULE_AUTHOR("Harvey Hunt <harveyhuntnexus@gmail.com
>> <mailto:harveyhuntnexus@gmail.com>>");
>> +MODULE_DESCRIPTION("Ingenic JZ4780 BCH error correction driver");
>> +MODULE_LICENSE("GPL v2");
>> diff --git a/drivers/mtd/nand/raw/jz4780_bch_internal.h
>> b/drivers/mtd/nand/raw/jz4780_bch_internal.h
>> new file mode 100644
>> index 000000000000..7162e4f872f4
>> --- /dev/null
>> +++ b/drivers/mtd/nand/raw/jz4780_bch_internal.h
>> @@ -0,0 +1,34 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +#ifndef __DRIVERS_MTD_NAND_JZ4780_BCH_INTERNAL_H__
>> +#define __DRIVERS_MTD_NAND_JZ4780_BCH_INTERNAL_H__
>> +
>> +#include <linux/compiler_types.h>
>> +#include <linux/mutex.h>
>> +#include <linux/types.h>
>> +
>> +struct jz4780_bch_params;
>> +struct jz4780_bch;
>> +struct device;
>> +struct clk;
>> +
>> +struct jz4780_bch_ops {
>> + void (*disable)(struct jz4780_bch *bch);
>> + int (*calculate)(struct jz4780_bch *bch,
>> + struct jz4780_bch_params *params,
>> + const u8 *buf, u8 *ecc_code);
>> + int (*correct)(struct jz4780_bch *bch,
>> + struct jz4780_bch_params *params,
>> + u8 *buf, u8 *ecc_code);
>> +};
>> +
>> +struct jz4780_bch {
>> + struct device *dev;
>> + const struct jz4780_bch_ops *ops;
>> + void __iomem *base;
>> + struct clk *clk;
>> + struct mutex lock;
>> +};
>> +
>> +extern const struct jz4780_bch_ops jz4780_bch_jz4780_ops;
>> +
>> +#endif /* __DRIVERS_MTD_NAND_JZ4780_BCH_INTERNAL_H__ */
>
^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2019-01-18 14:22 UTC | newest]
Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-01-18 1:06 [PATCH 1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz Paul Cercueil
2019-01-18 1:06 ` [PATCH 2/8] dt-bindings: mtd: ingenic: Add compatible strings for the JZ4725B Paul Cercueil
2019-01-18 8:20 ` Boris Brezillon
2019-01-18 1:06 ` [PATCH 3/8] mtd: rawnand: jz4780: Use SPDX license notifiers Paul Cercueil
2019-01-18 8:22 ` Boris Brezillon
2019-01-18 1:06 ` [PATCH 4/8] mtd: rawnand: jz4780: Add support for the JZ4725B Paul Cercueil
2019-01-18 8:26 ` Boris Brezillon
2019-01-18 1:06 ` [PATCH 5/8] mtd: rawnand: jz4780: Add ooblayout " Paul Cercueil
2019-01-18 8:29 ` Boris Brezillon
2019-01-18 1:06 ` [PATCH 6/8] mtd: rawnand: jz4780-bch: Don't set clock rate in driver Paul Cercueil
2019-01-18 8:31 ` Boris Brezillon
2019-01-18 1:06 ` [PATCH 7/8] mtd: rawnand: jz4780-bch: Separate top-level and SoC specific code Paul Cercueil
2019-01-18 8:35 ` Boris Brezillon
2019-01-18 14:22 ` Paul Cercueil
2019-01-18 1:06 ` [PATCH 8/8] mtd: rawnand: jz4780-bch: Add support for the JZ4725B Paul Cercueil
2019-01-18 8:07 ` [PATCH 1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz Boris Brezillon
2019-01-18 14:15 ` Paul Cercueil
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