From: Thomas Bogendoerfer <tbogendoerfer@suse.de>
To: Christoph Hellwig <hch@infradead.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
James Hogan <jhogan@kernel.org>,
linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org,
linux-pci@vger.kernel.org,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Paul Burton <paul.burton@mips.com>,
Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH 7/7] MIPS: SGI-IP27: abstract chipset irq from bridge
Date: Fri, 1 Feb 2019 15:37:26 +0100 [thread overview]
Message-ID: <20190201153726.e3ce44c4a3fb22f5f5d6bcf3@suse.de> (raw)
In-Reply-To: <20190128162721.GA25378@infradead.org>
On Mon, 28 Jan 2019 08:27:21 -0800
Christoph Hellwig <hch@infradead.org> wrote:
> On Mon, Jan 28, 2019 at 03:01:35PM +0100, Thomas Bogendoerfer wrote:
> > On Mon, 28 Jan 2019 05:33:17 -0800
> > Christoph Hellwig <hch@infradead.org> wrote:
> >
> > > Shouldnt this just use chained irqchip drivers instead?
> >
> > you mean using irq_set_chained_handler() ? If yes, this IMHO doesn't look usefull
> > because it's used for adding a secondary interrupt controller. But what I need
> > is telling bridge ASIC to direct the xtalk IRQ packet to a specific HUB/HEART/BEDROCK
> > from the HUB/HEART/BEDROCK specific code. And want to avoid dragging in bridge details
> > to that specific code.
>
> Yes, but don't we have nested interrupt controllers here? Even if they
> don't really do much in the fast path the setup does look chained to me.
> Then again I'm not really an expert in the irq handling code nor in this
> hardware, so maybe Thomas or Marc might have a better idea.
found a presentation from Marc and what I need here is irqdomain hierarchy.
Which meana converting the whole hub irq code to irqdomain first. Let's see
how easy this will be:-)
Thomas.
--
SUSE Linux GmbH
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)
prev parent reply other threads:[~2019-02-01 14:37 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-24 17:47 [PATCH 0/7] MIPS: SGI-IP27 rework Thomas Bogendoerfer
2019-01-24 17:47 ` [PATCH 1/7] MIPS: SGI-IP27: get rid of volatile and hubreg_t Thomas Bogendoerfer
2019-01-24 17:47 ` [PATCH 2/7] MIPS: SGI-IP27: clean up bridge access and header files Thomas Bogendoerfer
2019-01-28 13:20 ` Christoph Hellwig
2019-01-28 13:24 ` Thomas Bogendoerfer
2019-01-28 13:33 ` Christoph Hellwig
2019-01-24 17:47 ` [PATCH 3/7] MIPS: SGI-IP27: use pr_info/pr_emerg and pr_cont to fix output Thomas Bogendoerfer
2019-01-24 17:47 ` [PATCH 4/7] MIPS: SGI-IP27: do xtalk scanning later Thomas Bogendoerfer
2019-01-24 17:47 ` [PATCH 5/7] MIPS: SGI-IP27: rework HUB interrupts Thomas Bogendoerfer
2019-01-28 13:26 ` Christoph Hellwig
2019-01-24 17:47 ` [PATCH 6/7] MIPS: SGI-IP27: use generic PCI driver Thomas Bogendoerfer
2019-01-28 13:32 ` Christoph Hellwig
2019-01-29 15:24 ` Thomas Bogendoerfer
2019-01-30 9:17 ` Christoph Hellwig
2019-01-30 17:25 ` Thomas Bogendoerfer
2019-01-30 17:28 ` Christoph Hellwig
2019-02-18 10:58 ` Thomas Bogendoerfer
2019-02-20 15:10 ` Christoph Hellwig
2019-02-20 15:20 ` Thomas Bogendoerfer
2019-01-24 17:47 ` [PATCH 7/7] MIPS: SGI-IP27: abstract chipset irq from bridge Thomas Bogendoerfer
2019-01-28 13:33 ` Christoph Hellwig
2019-01-28 14:01 ` Thomas Bogendoerfer
2019-01-28 16:27 ` Christoph Hellwig
2019-02-01 14:37 ` Thomas Bogendoerfer [this message]
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