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received-spf: None (protection.outlook.com: wavecomp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: hBWJgI4yKYw2CDNyKPLUYxUN4QaQjVkC2Y11TeWcfF6zt6ZCQ8Dj50Rp0kUUPEDCzkL/dwz++RI1ctPNzqyfWqC/45y0NjEW/873CAlSfeTdYYKa+ZlJKvIN+cvVwIopLDYo6eFMOcrjnHcP3a2vZRzuw+11qO3bNSp4KUelggu+I4hlnHU3mFtRLs4BQpapTFwj724av10CkgqJrneN7Uyiy6Kt8NeY80+IsU/jskIWAmbm1yCdMnfftn1GCTobEPnMCYT7djCDpFPnQvynwIB9i/RSO2cGE5a9UxSwd9X9/983xn7IkJ8A3644ljg7LxVKYyeyG+JAmtNlYDjn/8eCc/4vEVVmtsVKlb7Anbyrmav5mPNtPD4NcFrcC98vAG02oDc10cWCXjTa3AEoiHk5iua1RZF//taOuI9H9h0= Content-Type: text/plain; charset="us-ascii" Content-ID: <21DF7EAEFB82A945B9A9D82A73D0DDFD@namprd22.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: mips.com X-MS-Exchange-CrossTenant-Network-Message-Id: 47179be5-b4c3-40bb-5689-08d6983e3ca3 X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Feb 2019 20:50:39.1655 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-id: 463607d3-1db3-40a0-8a29-970c56230104 X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR2201MB1358 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Hi Thomas, On Tue, Feb 19, 2019 at 04:57:14PM +0100, Thomas Bogendoerfer wrote: > SGI IP27 (Origin/Onyx2) and SGI IP30 (Octane) have a similair > architecture and share some hardware (ioc3/bridge). To share > the software parts this patchset reworks SGI IP27 interrupt > and pci bridge code. By using features Linux gained during the > many years since SGI IP27 code was integrated this even results > in code reduction and IMHO cleaner code. >=20 > Tests have been done on a two module O200 (4 CPUs) and an > Origin 2000 (8 CPUs). >=20 > My next step in integrating SGI IP30 support is splitting ioc3eth > into a MFD and subdevice drivers. Prototype is working, but needs > still more clean ups. >=20 > Changes in v2: >=20 > - replaced HUB_L/HUB_S by __raw_readq/__raw_writeq > - removed union bridge_ate > - replaced remaing fields in slice_data by per_cpu data > - use generic_handle_irq instead of do_IRQ > - use hierarchy irq domain for stacking bridge and hub interrupt > - moved __dma_to_phys/__phy_to_dma to mach-ip27/dma-direct.h > - use dev_to_node() for pcibus_to_node() implementation >=20 > Thomas Bogendoerfer (10): > MIPS: SGI-IP27: get rid of volatile and hubreg_t > MIPS: SGI-IP27: clean up bridge access and header files > MIPS: SGI-IP27: use pr_info/pr_emerg and pr_cont to fix output > MIPS: SGI-IP27: do xtalk scanning later > MIPS: SGI-IP27: do boot CPU init later > MIPS: SGI-IP27: rework HUB interrupts > PCI: call add_bus method also for root bus > MIPS: SGI-IP27: use generic PCI driver > genirq/irqdomain: fall back to default domain when creating hierarchy > domain > MIPS: SGI-IP27: abstract chipset irq from bridge I have patches 1-6 applied locally - would you be happy for those to be pushed to mips-next without 7-10? I know ip27_defconfig still builds but have no idea whether it still works :) I don't appear to have received patches 7 or 9 but I see from archives there'll be a v3 of patch 9 at least. So I can either apply 1-6 for v5.1 or defer the whole series. Let me know - I'm happy either way. Thanks, Paul