[PATCH 2/4] MIPS: refactor virtual address size selection

[Wang Xuerui <wangxuerui@qiniu.com>]

To facilitate future extensions of VA space, put all VA size selection
under a choice section, and add an entry corresponding to previous
default behavior.

Also, for sharing the implementation, rename the former MIPS_VA_BITS_48
symbol to MIPS_LARGE_VA, but re-use the name in the choice section for
config file compatibility.

Signed-off-by: Wang Xuerui <wangxuerui@qiniu.com>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Alex Belits <alex.belits@cavium.com>
Cc: James Hogan <james.hogan@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
---
 arch/mips/Kconfig                  | 28 ++++++++++++++++++++++++----
 arch/mips/include/asm/pgtable-64.h | 10 +++++-----
 arch/mips/include/asm/processor.h  |  2 +-
 3 files changed, 30 insertions(+), 10 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index a84c24d894aa..b0068a1e1e33 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -2158,12 +2158,27 @@ config KVM_GUEST_TIMER_FREQ
 	  emulation when determining guest CPU Frequency. Instead, the guest's
 	  timer frequency is specified directly.
 
+choice
+	prompt "Virtual address size"
+	default MIPS_VA_BITS_DEFAULT
+
+config MIPS_VA_BITS_DEFAULT
+	bool "40 bits or less virtual memory"
+	help
+	  This is the default setting on MIPS platforms since antiquity,
+	  which gives 40 bits or less of virtual address space, depending on
+	  the CPU.
+
+	  If unsure, say Y.
+
 config MIPS_VA_BITS_48
 	bool "48 bits virtual memory"
 	depends on 64BIT
+	select MIPS_LARGE_VA
 	help
 	  Support a maximum at least 48 bits of application virtual
-	  memory.  Default is 40 bits or less, depending on the CPU.
+	  memory.
+
 	  For page sizes 16k and above, this option results in a small
 	  memory overhead for page tables.  For 4k page size, a fourth
 	  level of page tables is added which imposes both a memory
@@ -2171,6 +2186,11 @@ config MIPS_VA_BITS_48
 
 	  If unsure, say N.
 
+endchoice
+
+config MIPS_LARGE_VA
+	bool
+
 choice
 	prompt "Kernel page size"
 	default PAGE_SIZE_4KB
@@ -2187,7 +2207,7 @@ config PAGE_SIZE_4KB
 config PAGE_SIZE_8KB
 	bool "8kB"
 	depends on CPU_R8000 || CPU_CAVIUM_OCTEON
-	depends on !MIPS_VA_BITS_48
+	depends on !MIPS_LARGE_VA
 	help
 	  Using 8kB page size will result in higher performance kernel at
 	  the price of higher memory consumption.  This option is available
@@ -2206,7 +2226,7 @@ config PAGE_SIZE_16KB
 config PAGE_SIZE_32KB
 	bool "32kB"
 	depends on CPU_CAVIUM_OCTEON
-	depends on !MIPS_VA_BITS_48
+	depends on !MIPS_LARGE_VA
 	help
 	  Using 32kB page size will result in higher performance kernel at
 	  the price of higher memory consumption.  This option is available
@@ -3070,7 +3090,7 @@ config HAVE_LATENCYTOP_SUPPORT
 
 config PGTABLE_LEVELS
 	int
-	default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
+	default 4 if PAGE_SIZE_4KB && MIPS_LARGE_VA
 	default 3 if 64BIT && !PAGE_SIZE_64KB
 	default 2
 
diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h
index 93a9dce31f25..77a71be71b51 100644
--- a/arch/mips/include/asm/pgtable-64.h
+++ b/arch/mips/include/asm/pgtable-64.h
@@ -18,9 +18,9 @@
 #include <asm/fixmap.h>
 
 #define __ARCH_USE_5LEVEL_HACK
-#if defined(CONFIG_PAGE_SIZE_64KB) && !defined(CONFIG_MIPS_VA_BITS_48)
+#if defined(CONFIG_PAGE_SIZE_64KB) && !defined(CONFIG_MIPS_LARGE_VA)
 #include <asm-generic/pgtable-nopmd.h>
-#elif !(defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_MIPS_VA_BITS_48))
+#elif !(defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_MIPS_LARGE_VA))
 #include <asm-generic/pgtable-nopud.h>
 #endif
 
@@ -83,7 +83,7 @@
  * of virtual address space.
  */
 #ifdef CONFIG_PAGE_SIZE_4KB
-# ifdef CONFIG_MIPS_VA_BITS_48
+# ifdef CONFIG_MIPS_LARGE_VA
 #  define PGD_ORDER		0
 #  define PUD_ORDER		0
 # else
@@ -100,7 +100,7 @@
 #define PTE_ORDER		0
 #endif
 #ifdef CONFIG_PAGE_SIZE_16KB
-#ifdef CONFIG_MIPS_VA_BITS_48
+#ifdef CONFIG_MIPS_LARGE_VA
 #define PGD_ORDER               1
 #else
 #define PGD_ORDER               0
@@ -118,7 +118,7 @@
 #ifdef CONFIG_PAGE_SIZE_64KB
 #define PGD_ORDER		0
 #define PUD_ORDER		aieeee_attempt_to_allocate_pud
-#ifdef CONFIG_MIPS_VA_BITS_48
+#ifdef CONFIG_MIPS_LARGE_VA
 #define PMD_ORDER		0
 #else
 #define PMD_ORDER		aieeee_attempt_to_allocate_pmd
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index c50cba85d145..226cf46cc89c 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -62,7 +62,7 @@ extern unsigned int vced_count, vcei_count;
  * 8192EB ...
  */
 #define TASK_SIZE32	0x7fff8000UL
-#ifdef CONFIG_MIPS_VA_BITS_48
+#ifdef CONFIG_MIPS_LARGE_VA
 #define TASK_SIZE64     (0x1UL << min(cpu_data[0].vmbits, 48))
 #else
 #define TASK_SIZE64     0x10000000000UL
-- 
2.16.1