Re: [PATCH] arch/mips/kvm/emulate.c: Don't waste /dev/random emulating TLBWR

[George Spelvin <lkml@sdf.org>]

On Fri, 22 Mar 2019 at 00:00:45 +0000, Paul Burton wrote:
> On Thu, Mar 21, 2019 at 06:04:24AM +0000, George Spelvin wrote:
>> KVM_MIPS_GUEST_TLB_SIZE is 64, so we only need one random byte,
>> not 4.
>> 
>> A more complex question is whether we need crypto-grade random
>> numbers at all.  If safe, we could use prandom_u32().  If not,
>> we could seed a private PRNG and use prandom_u32_state().
>> 
>> Or could we just use asm("mfc0 %0, Random" : "=r" (index))?

> Thanks for the patch. I expect we should be fine with:
> 
>   index = prandom_u32_max(KVM_MIPS_GUEST_TLB_SIZE);
> 
> We certainly don't need crypto-grade randomness here. Using the cp0
> Random register would be an option for configurations prior to MIPSr6,
> where the Random register was deprecated & we shouldn't rely on its
> presence. So we could do:
> 
>   if (MIPS_ISA_REV < 6)
>     index = read_c0_random() % KVM_MIPS_GUEST_TLB_SIZE;
>   else
>     index = prandom_u32_max(KVM_MIPS_GUEST_TLB_SIZE);
> 
> Though whether that micro-optimization is worth the extra code is
> questionable.

I'm also not sure if you *want* to use the random register, because
that's a source of /dev/random entropy (arch/mips/include/asm/timex.h),
and maybe exposing it to VM guests would be a bad thing.

There's no need to get too fancy; prandom_u32_max is fine.  (And
gcc optimizes it to a shift if the argument is a compie-time power
of 2.)

Anyway, thank you for the response, and I'm assuming there's no need
for revised patch from me; as it's less work for you to write your own.