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Date:   Fri, 22 Mar 2019 23:41:20 +0200
From:   Aaro Koskinen <aaro.koskinen@iki.fi>
To:     Andrew Lunn <andrew@lunn.ch>
Cc:     Vinod Koul <vkoul@kernel.org>,
        "David S. Miller" <davem@davemloft.net>, netdev@vger.kernel.org,
        linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [BISECTED, REGRESSION] Broken networking on MIPS/OCTEON
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Hi,

On Fri, Mar 22, 2019 at 10:25:57PM +0100, Andrew Lunn wrote:
> > The OCTEON HW code knows only about RGMII. And looking at
> > octeon ethernet staging driver it does phy connect always with
> > PHY_INTERFACE_MODE_GMII. I did some experimentation, and it seems that
> > with PHY_INTERFACE_MODE_RGMII_RXID it starts to work.. In the DT we have
> > for ethernet for this board:
> > 
> > 	rx-delay = <0>;
> > 	tx-delay = <0x10>;
> 
> These are not PHY properties. 
> 
> Looking at the code, it looks like these control delays the MAC
> inserts. I don't see a binding document for these properties, so i've
> no idea what 0x10 means. Before this driver moves out of staging,
> these values should be changed to be in ns.

Documentation/devicetree/bindings/net/cavium-pip.txt

Not sure how I could figure out the ns values?

> However, PHY_INTERFACE_MODE_RGMII_RXID would make sense if 0x10 is
> sufficient to add the TX delay.
> 
> What the driver should however do is call of_of_get_phy_mode() to get
> the phy-mode from the DT blob and pass that to of_phy_connect().

OK, thanks, I'll try to work on this.

A.