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From: Antoine Tenart <antoine.tenart@bootlin.com>
To: davem@davemloft.net, richardcochran@gmail.com,
	alexandre.belloni@bootlin.com, UNGLinuxDriver@microchip.com,
	ralf@linux-mips.org, paul.burton@mips.com, jhogan@kernel.org
Cc: Antoine Tenart <antoine.tenart@bootlin.com>,
	netdev@vger.kernel.org, linux-mips@vger.kernel.org,
	thomas.petazzoni@bootlin.com, allan.nielsen@microchip.com
Subject: [PATCH net-next v3 6/8] net: mscc: improve the frame header parsing readability
Date: Wed, 24 Jul 2019 10:17:13 +0200	[thread overview]
Message-ID: <20190724081715.29159-7-antoine.tenart@bootlin.com> (raw)
In-Reply-To: <20190724081715.29159-1-antoine.tenart@bootlin.com>

This cosmetic patch improves the frame header parsing readability by
introducing a new macro to access and mask its fields.

Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
---
 drivers/net/ethernet/mscc/ocelot_board.c | 24 +++++++++++++-----------
 1 file changed, 13 insertions(+), 11 deletions(-)

diff --git a/drivers/net/ethernet/mscc/ocelot_board.c b/drivers/net/ethernet/mscc/ocelot_board.c
index 990027f04d1b..5e4f1718dd99 100644
--- a/drivers/net/ethernet/mscc/ocelot_board.c
+++ b/drivers/net/ethernet/mscc/ocelot_board.c
@@ -16,24 +16,26 @@
 
 #include "ocelot.h"
 
-static int ocelot_parse_ifh(u32 *ifh, struct frame_info *info)
+#define IFH_EXTRACT_BITFIELD64(x, o, w) (((x) >> (o)) & GENMASK_ULL((w) - 1, 0))
+
+static int ocelot_parse_ifh(u32 *_ifh, struct frame_info *info)
 {
-	int i;
 	u8 llen, wlen;
+	u64 ifh[2];
+
+	ifh[0] = be64_to_cpu(((__force __be64 *)_ifh)[0]);
+	ifh[1] = be64_to_cpu(((__force __be64 *)_ifh)[1]);
 
-	/* The IFH is in network order, switch to CPU order */
-	for (i = 0; i < IFH_LEN; i++)
-		ifh[i] = ntohl((__force __be32)ifh[i]);
+	wlen = IFH_EXTRACT_BITFIELD64(ifh[0], 7,  8);
+	llen = IFH_EXTRACT_BITFIELD64(ifh[0], 15,  6);
 
-	wlen = (ifh[1] >> 7) & 0xff;
-	llen = (ifh[1] >> 15) & 0x3f;
 	info->len = OCELOT_BUFFER_CELL_SZ * wlen + llen - 80;
 
-	info->port = (ifh[2] & GENMASK(14, 11)) >> 11;
+	info->port = IFH_EXTRACT_BITFIELD64(ifh[1], 43, 4);
 
-	info->cpuq = (ifh[3] & GENMASK(27, 20)) >> 20;
-	info->tag_type = (ifh[3] & BIT(16)) >> 16;
-	info->vid = ifh[3] & GENMASK(11, 0);
+	info->cpuq = IFH_EXTRACT_BITFIELD64(ifh[1], 20, 8);
+	info->tag_type = IFH_EXTRACT_BITFIELD64(ifh[1], 16,  1);
+	info->vid = IFH_EXTRACT_BITFIELD64(ifh[1], 0,  12);
 
 	return 0;
 }
-- 
2.21.0


  parent reply	other threads:[~2019-07-24  8:19 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-24  8:17 [PATCH net-next v3 0/8] net: mscc: PTP Hardware Clock (PHC) support Antoine Tenart
2019-07-24  8:17 ` [PATCH net-next v3 1/8] Documentation/bindings: net: ocelot: document the PTP bank Antoine Tenart
2019-07-24  8:17 ` [PATCH net-next v3 2/8] MIPS: dts: mscc: describe the PTP register range Antoine Tenart
2019-08-24 14:18   ` Paul Burton
2019-07-24  8:17 ` [PATCH net-next v3 3/8] Documentation/bindings: net: ocelot: document the PTP ready IRQ Antoine Tenart
2019-07-24  8:17 ` [PATCH net-next v3 4/8] MIPS: dts: mscc: describe the PTP ready interrupt Antoine Tenart
2019-08-22  7:56   ` Antoine Tenart
2019-08-24 14:18   ` Paul Burton
2019-07-24  8:17 ` [PATCH net-next v3 5/8] net: mscc: describe the PTP register range Antoine Tenart
2019-07-24  8:17 ` Antoine Tenart [this message]
2019-07-24  8:17 ` [PATCH net-next v3 7/8] net: mscc: remove the frame_info cpuq member Antoine Tenart
2019-07-24  8:17 ` [PATCH net-next v3 8/8] net: mscc: PTP Hardware Clock (PHC) support Antoine Tenart
2019-07-24 13:53   ` Richard Cochran
2019-07-24 18:52   ` David Miller
2019-07-25  7:24     ` Antoine Tenart

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