From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE98FC76186 for ; Wed, 24 Jul 2019 17:29:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 831EA21852 for ; Wed, 24 Jul 2019 17:29:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="vBfFUiqa" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387769AbfGXR2R (ORCPT ); Wed, 24 Jul 2019 13:28:17 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:52056 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728027AbfGXR2Q (ORCPT ); Wed, 24 Jul 2019 13:28:16 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1563988665; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=uzIRBKbB7UU2QNs9lNEqqrq3se/+CB7MiPHQYfklzC8=; b=vBfFUiqaUOJAoAv6zMOJv+FLPitr8wCJi+GcqrB341SCXYgHJ3lJR8xaUn8F3J/PYavDfC tySQI3rwuKbvsBcfd3ThujnMl0PTdJPo4eL+pIhPIdJcQ3OjCuBP8ovg6zA6KFKh8oABMq gCB+ugQsu2DAZZpNvSKY/ZOsQZP31i0= From: Paul Cercueil To: Ralf Baechle , Paul Burton , James Hogan , Jonathan Corbet , Lee Jones , Arnd Bergmann , Daniel Lezcano , Thomas Gleixner , Michael Turquette , Stephen Boyd , Jason Cooper , Marc Zyngier , Rob Herring , Mark Rutland Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mips@vger.kernel.org, linux-clk@vger.kernel.org, od@zcrc.me, Mathieu Malaterre , Paul Cercueil , Artur Rojek Subject: [PATCH v15 11/13] MIPS: CI20: Reduce system timer and clocksource to 3 MHz Date: Wed, 24 Jul 2019 13:16:13 -0400 Message-Id: <20190724171615.20774-12-paul@crapouillou.net> In-Reply-To: <20190724171615.20774-1-paul@crapouillou.net> References: <20190724171615.20774-1-paul@crapouillou.net> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The default clock (48 MHz) is too fast for the system timer. Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre Tested-by: Artur Rojek --- Notes: v5: New patch v6: Set also the rate for the clocksource channel's clock v7: No change v8: No change v9: Don't configure clock timer1, as the OS Timer is used as clocksource on this SoC v10: Revert back to v8 bahaviour. Let the user choose what clocksource should be used. v11-v15: No change arch/mips/boot/dts/ingenic/ci20.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index 4f7b1fa31cf5..2e9952311ecd 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts @@ -2,6 +2,7 @@ /dts-v1/; #include "jz4780.dtsi" +#include #include / { @@ -238,3 +239,9 @@ bias-disable; }; }; + +&tcu { + /* 3 MHz for the system timer and clocksource */ + assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>; + assigned-clock-rates = <3000000>, <3000000>; +}; -- 2.21.0.593.g511ec345e18