From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: tglx@linutronix.de, jason@lakedaemon.net, maz@kernel.org,
ralf@linux-mips.org, paul.burton@mips.com, jhogan@kernel.org,
robh+dt@kernel.org, linux-mips@vger.kernel.org,
devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, mark.rutland@arm.com,
john@phrozen.org, hauke@hauke-m.de,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Subject: [PATCH 4/5] MIPS: dts: lantiq: danube: mark the ebu0 node as interrupt-controller
Date: Sat, 27 Jul 2019 19:53:14 +0200 [thread overview]
Message-ID: <20190727175315.28834-5-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20190727175315.28834-1-martin.blumenstingl@googlemail.com>
The EBU IP block provides one interrupt line for PCI_INTA. Mark the ebu0
node as interrupt-controller and pass the parent interrupt from ICU so
the PCI_INTA interrupt from EBU can be used.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
arch/mips/boot/dts/lantiq/danube.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/boot/dts/lantiq/danube.dtsi b/arch/mips/boot/dts/lantiq/danube.dtsi
index 510be63c8bdf..0208174b53c8 100644
--- a/arch/mips/boot/dts/lantiq/danube.dtsi
+++ b/arch/mips/boot/dts/lantiq/danube.dtsi
@@ -89,6 +89,9 @@
ebu0: ebu@e105300 {
compatible = "lantiq,ebu-xway";
reg = <0xe105300 0x100>;
+ interrupt-parent = <&icu0>;
+ interrupts = <30>;
+ #interrupt-cells = <2>;
};
pci0: pci@e105400 {
--
2.22.0
next prev parent reply other threads:[~2019-07-27 17:53 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-27 17:53 [PATCH 0/5] MIPS: lantiq: EBU interrupt controller and generalization Martin Blumenstingl
2019-07-27 17:53 ` [PATCH 1/5] dt-bindings: MIPS: lantiq: Add documentation for the External Bus Unit Martin Blumenstingl
2019-07-29 23:17 ` Rob Herring
2019-07-27 17:53 ` [PATCH 2/5] MIPS: lantiq: use a generic "EBU" driver for Falcon and XWAY SoCs Martin Blumenstingl
2019-07-27 18:35 ` John Crispin
2019-07-27 18:37 ` Martin Blumenstingl
2019-07-27 17:53 ` [PATCH 3/5] MIPS: lantiq: add an irq_domain and irq_chip for EBU Martin Blumenstingl
2019-07-28 10:01 ` Marc Zyngier
2019-08-01 17:42 ` Martin Blumenstingl
2019-08-03 9:12 ` Marc Zyngier
2019-08-03 17:33 ` Martin Blumenstingl
2019-08-05 15:03 ` Marc Zyngier
2019-07-27 17:53 ` Martin Blumenstingl [this message]
2019-07-27 17:53 ` [PATCH 5/5] MIPS: dts: lantiq: danube: easy50712: route the PCI_INTA IRQ through EBU Martin Blumenstingl
2019-07-28 10:03 ` Marc Zyngier
2019-07-29 21:55 ` Hauke Mehrtens
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190727175315.28834-5-martin.blumenstingl@googlemail.com \
--to=martin.blumenstingl@googlemail.com \
--cc=devicetree@vger.kernel.org \
--cc=hauke@hauke-m.de \
--cc=jason@lakedaemon.net \
--cc=jhogan@kernel.org \
--cc=john@phrozen.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=maz@kernel.org \
--cc=paul.burton@mips.com \
--cc=ralf@linux-mips.org \
--cc=robh+dt@kernel.org \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).