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received-spf: None (protection.outlook.com: wavecomp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: qQDvbC9kCq/C6uU7fZ7/hjODgg4uf5t6DyDcQT7D5pZhd0MWXc/LJNYVnrXVdWRQ1gHrD91ILe3QQy+pjhLEQmHTe/q1rvwgK1/eW+rzrbVI2QO4K4qUZ6DfnClAcBIffd35Jwx5DiIegx9ks3lDYaonBAQzgDpUvuzFaxIcSgqRzwz5GNlXv6SE8wSw++b9nr6/ijZU/GNrCuXJGP2ps28Zg1Q2lYZSyGnQzrtLnmtLdDszs6Nexmaf1MAu54Oquhke3hQDgBjjyonf03fFjND+f1dJYfQGQSkE+L9br6pYx3K+3T3WxBrkUPRdnnTJT7T0zyfgzN527CGaYfSVpZoQBlDikSqZEOwKa/PBekPe0nU6k+0Adjzm5Bh1HsAmzKpwSJjWndAZjvEI59PQJmokcSZodcujZBZv998VsPs= Content-Type: text/plain; charset="us-ascii" Content-ID: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: mips.com X-MS-Exchange-CrossTenant-Network-Message-Id: b7b67f9f-7868-4a47-9969-08d7144ad2a2 X-MS-Exchange-CrossTenant-originalarrivaltime: 29 Jul 2019 17:33:09.2423 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 463607d3-1db3-40a0-8a29-970c56230104 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: pburton@wavecomp.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR2201MB1437 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Hi Chuanhong, On Wed, Jul 24, 2019 at 10:23:08AM +0800, Chuanhong Guo wrote: > This commit adds device tree binding documentation for MT7621 > PLL controller. >=20 > Signed-off-by: Chuanhong Guo > --- >=20 > Change since v1: > drop useless syscon in compatible string >=20 > .../bindings/clock/mediatek,mt7621-pll.txt | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt76= 21-pll.txt This binding needs review from DT maintainers before I apply it, but as a general note it's typical to add the binding *before* its use in the series. That is, this patch should come before patch 3. Personally I'd squash it with patch 1 so the binding & the header file needed to use the binding are added in one patch, then a later patch actually makes use of them. Thanks, Paul > diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt7621-pll.= txt b/Documentation/devicetree/bindings/clock/mediatek,mt7621-pll.txt > new file mode 100644 > index 000000000000..7dcfbd5283e3 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/mediatek,mt7621-pll.txt > @@ -0,0 +1,18 @@ > +Binding for Mediatek MT7621 PLL controller > + > +The PLL controller provides the 2 main clocks of the SoC: CPU and BUS. > + > +Required Properties: > +- compatible: has to be "mediatek,mt7621-pll" > +- #clock-cells: has to be one > + > +Optional properties: > +- clock-output-names: should be "cpu", "bus" > + > +Example: > + pll { > + compatible =3D "mediatek,mt7621-pll"; > + > + #clock-cells =3D <1>; > + clock-output-names =3D "cpu", "bus"; > + }; > --=20 > 2.21.0 >=20