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From: Paul Burton <paulburton@kernel.org>
To: Huacai Chen <chenhc@lemote.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>,
	Paul Burton <paul.burton@mips.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	James Hogan <jhogan@kernel.org>,
	Linux MIPS Mailing List <linux-mips@linux-mips.org>,
	"open list:MIPS" <linux-mips@vger.kernel.org>,
	Fuxin Zhang <zhangfx@lemote.com>,
	Zhangjin Wu <wuzhangjin@gmail.com>
Subject: Re: [PATCH] MIPS: Make sure ebase address is in KSEG0
Date: Mon, 25 Nov 2019 15:42:34 -0800	[thread overview]
Message-ID: <20191125234234.bwoyuxbmwa4jpxwb@lantea.localdomain> (raw)
In-Reply-To: <CAAhV-H4R1LqwLyehnTo89XPCeZo=ka=p29_rHVg=vJ_YiqqNCQ@mail.gmail.com>

Hi Huacai,

On Sun, Nov 24, 2019 at 12:00:51PM +0800, Huacai Chen wrote:
> On Sat, Nov 23, 2019 at 2:11 PM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote:
> > 于 2019年11月23日 GMT+08:00 下午1:08:38, Jiaxun Yang <jiaxun.yang@flygoat.com> 写到:
> > >于 2019年11月23日 GMT+08:00 上午2:47:31, Paul Burton <paulburton@kernel.org>
> > >写到:
> > >>On Thu, Nov 21, 2019 at 07:30:20PM +0800, Huacai Chen wrote:
> > >>> Dynamically allocated ebase address above 0x20000000 can be
> > >triggered
> > >>> by some special physical memory layout, or just by a "big kernel +
> > >>big
> > >>> initrd + big swiotlb" configuration.
> > >>>
> > >>> For MIPS32, ebase address above 0x20000000 is unusable, for MIPS64
> > >it
> > >>> is usable but this case is warned. However, this warning is useless
> > >>> because it is unfixable in a specific system configuration. So we
> > >>just
> > >>> use CKSEG0 as a fallback.
> > >>
> > >>I'd prefer that we don't assume there's memory at physical address
> > >zero
> > >>- that property doesn't hold for all systems.
> > >>
> > >>How about the change I suggested previously over here:
> > >>
> > >>https://lore.kernel.org/linux-mips/20191108191149.bbq3h4xp4famsh2n@lantea.localdomain/
> > >>
> > >>Would that work for you?
>
> Now this patch has nothing to do with WG bit,

Well, kind of. The 512MB limit is implicitly tied to the lack of a
functional WG bit.

> and also has nothing to do with Loongson, it just a problem with ebase
> address -- on any MIPSr2 platforms where ebase is dynamically
> allocated.

Right, and the patch I proposed ensures that the allocation happens in
the low 512MB for systems without the WG bit, ie. in memory we can
access via kseg0. It just doesn't assume the memory is at physical
address 0 - it might be, but on some systems there might not even be
memory at 0.

In practice we allocate memory bottom-up, so I'm not sure how you're
managing to see problems here anyway - allocations this early should
easily be within the low 512MB. If you could explain step by step what
actually goes wrong on your system that would be helpful.

> In the comments it is said that ebase address above 0x20000000 (which
> should be in XKphys) has problems to handle cache error. However, if
> we really treat it as a problem, we should avoid it (not just a
> warning); and if we don't think it is a problem, then we can remove
> the warning (because the warning is unfixable in a specific system
> configuration).

The warning can probably go away if my patch is applied, since the
allocation is constrained to the right memory region anyway.

Thanks,
    Paul

  reply	other threads:[~2019-11-25 23:41 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-21 11:30 [PATCH] MIPS: Make sure ebase address is in KSEG0 Huacai Chen
2019-11-22 18:47 ` Paul Burton
2019-11-23  5:08   ` Jiaxun Yang
2019-11-23  6:11     ` Jiaxun Yang
2019-11-24  4:00       ` Huacai Chen
2019-11-25 23:42         ` Paul Burton [this message]
2019-11-26  1:55           ` Huacai Chen

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