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From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Paul Burton <paulburton@kernel.org>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>,
	linux-mips@vger.kernel.org, chenhc@lemote.com,
	paul.burton@mips.com, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] MIPS: Introduce aligned IO memory operations
Date: Fri, 24 Jan 2020 15:07:51 +0100	[thread overview]
Message-ID: <20200124140751.GA17030@alpha.franken.de> (raw)
In-Reply-To: <20200122184506.7zbzetn5xturxamj@pburton-laptop>

On Wed, Jan 22, 2020 at 10:45:06AM -0800, Paul Burton wrote:
> Hi Jiaxun,
> 
> On Tue, Jan 14, 2020 at 08:23:43PM +0800, Jiaxun Yang wrote:
> > Some platforms, such as Loongson64 or QEMU/KVM, don't support unaligned
> > instructions like lwl or lwr in IO memory access. However, our current
> > IO memcpy/memset is wired to the generic implementation, which leads
> > to a fatal result.
> 
> Hmm, I wonder if we should just do this unconditionally on all systems.
> I can't think of a reason it'd ever be a good idea to use lwl/lwr on an
> MMIO device. Any thoughts on that?

depends on the type of device. I can see benefits for framebuffers
and memory devices since memset/memcpy are more optimised than the
function in this patch.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

  reply	other threads:[~2020-01-24 14:24 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-14 12:23 [PATCH] MIPS: Introduce aligned IO memory operations Jiaxun Yang
2020-01-18 14:41 ` Philippe Mathieu-Daudé
2020-01-18 15:13   ` Jiaxun Yang
2020-01-22 18:45 ` Paul Burton
2020-01-24 14:07   ` Thomas Bogendoerfer [this message]
2020-01-25  3:31     ` Jiaxun Yang

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