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From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: WANG Xuerui <git@xen0n.name>
Cc: linux-mips@vger.kernel.org, Huacai Chen <chenhc@lemote.com>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>,
	Tiezhu Yang <yangtiezhu@loongson.cn>
Subject: Re: [PATCH v4 3/3] MIPS: handle Loongson-specific GSExc exception
Date: Tue, 28 Jul 2020 22:51:25 +0200
Message-ID: <20200728205125.GA22052@alpha.franken.de> (raw)
In-Reply-To: <20200728100655.3005831-4-git@xen0n.name>

On Tue, Jul 28, 2020 at 06:06:55PM +0800, WANG Xuerui wrote:
> index a1b966f3578e..5fa87d4b5dca 100644
> --- a/arch/mips/kernel/genex.S
> +++ b/arch/mips/kernel/genex.S
> @@ -498,6 +498,12 @@ NESTED(nmi_handler, PT_SIZE, sp)
>  	KMODE
>  	.endm
>  
> +	.macro __build_clear_gsexc
> +	mfc0	a1, CP0_DIAGNOSTIC1

this doesn't work when building for a legacy core:

/local/tbogendoerfer/korg/linux/arch/mips/kernel/genex.S: Assembler messages:
/local/tbogendoerfer/korg/linux/arch/mips/kernel/genex.S:565: Error: invalid operands `mfc0 $5,$22,1'

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

  reply index

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-28 10:06 [PATCH v4 0/3] Refactor FTLBPar exception handling and add GSExc handler WANG Xuerui
2020-07-28 10:06 ` [PATCH v4 1/3] MIPS: only register FTLBPar exception handler for supported models WANG Xuerui
2020-07-28 10:06 ` [PATCH v4 2/3] MIPS: add definitions for Loongson-specific CP0.Diag1 register WANG Xuerui
2020-07-28 10:06 ` [PATCH v4 3/3] MIPS: handle Loongson-specific GSExc exception WANG Xuerui
2020-07-28 20:51   ` Thomas Bogendoerfer [this message]
2020-07-29 12:21     ` WANG Xuerui

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