[PATCH 1/4] MIPS: head.S: Init fw_passed_dtb to builtin DTB

[PATCH 1/4] MIPS: head.S: Init fw_passed_dtb to builtin DTB

[Paul Cercueil]

Init the 'fw_passed_dtb' pointer to the buit-in Device Tree blob when it
has been compiled in with CONFIG_BUILTIN_DTB.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/kernel/head.S | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index 3b02ffe46304..7dd234e788e6 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -111,6 +111,12 @@ NESTED(kernel_entry, 16, sp)			# kernel entry point
 	move		t2, a1
 	beq		a0, t1, dtb_found
 
+#ifdef CONFIG_BUILTIN_DTB
+	PTR_LA	t2, __dtb_start
+	PTR_LA	t1, __dtb_end
+	bne		t1, t2, dtb_found
+#endif /* CONFIG_BUILTIN_DTB */
+
 	li		t2, 0
 dtb_found:
 #endif /* CONFIG_USE_OF */
-- 
2.27.0

[PATCH 2/4] MIPS: ingenic: Use fw_passed_dtb even if CONFIG_BUILTIN_DTB

[Paul Cercueil]

The fw_passed_dtb is now properly initialized even when
CONFIG_BUILTIN_DTB is used, so there's no need to handle it in any
particular way here.

Note that the behaviour is slightly different, as the previous code used
the built-in Device Tree unconditionally, while now the built-in Device
Tree is only used when the bootloader did not provide one.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/jz4740/setup.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/arch/mips/jz4740/setup.c b/arch/mips/jz4740/setup.c
index fc49601c2b96..d73c9b722bf3 100644
--- a/arch/mips/jz4740/setup.c
+++ b/arch/mips/jz4740/setup.c
@@ -67,13 +67,8 @@ static unsigned long __init get_board_mach_type(const void *fdt)
 
 void __init plat_mem_setup(void)
 {
+	void *dtb = (void *)fw_passed_dtb;
 	int offset;
-	void *dtb;
-
-	if (__dtb_start != __dtb_end)
-		dtb = __dtb_start;
-	else
-		dtb = (void *)fw_passed_dtb;
 
 	__dt_setup_arch(dtb);
 
-- 
2.27.0

[PATCH 3/4] MIPS: DTS: ingenic/qi,lb60: Add model and memory node

[Paul Cercueil]

Add a memory node, which was missing until now, and use the retail name
"Ben Nanonote" as the model, as it is way more known under that name
than under the name "LB60".

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/boot/dts/ingenic/qi_lb60.dts | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/mips/boot/dts/ingenic/qi_lb60.dts b/arch/mips/boot/dts/ingenic/qi_lb60.dts
index eda37fb516f0..bf298268f1a1 100644
--- a/arch/mips/boot/dts/ingenic/qi_lb60.dts
+++ b/arch/mips/boot/dts/ingenic/qi_lb60.dts
@@ -16,6 +16,12 @@
 
 / {
 	compatible = "qi,lb60", "ingenic,jz4740";
+	model = "Ben Nanonote";
+
+	memory {
+		device_type = "memory";
+		reg = <0x0 0x2000000>;
+	};
 
 	chosen {
 		stdout-path = &uart0;
-- 
2.27.0

[PATCH 4/4] MIPS: ingenic: Hardcode mem size for qi,lb60 board

[Paul Cercueil]

Old Device Tree for the qi,lb60 (aka. Ben Nanonote) did not have a
'memory' node. The kernel would then read the memory controller
registers to know how much RAM was available.

Since every other supported board has had a 'memory' node from the
beginning, we can just hardcode a RAM size of 32 MiB when running with
an old Device Tree without the 'memory' node.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/jz4740/setup.c | 37 ++++++++-----------------------------
 1 file changed, 8 insertions(+), 29 deletions(-)

diff --git a/arch/mips/jz4740/setup.c b/arch/mips/jz4740/setup.c
index d73c9b722bf3..51d906325ce6 100644
--- a/arch/mips/jz4740/setup.c
+++ b/arch/mips/jz4740/setup.c
@@ -14,6 +14,7 @@
 #include <linux/of_clk.h>
 #include <linux/of_fdt.h>
 #include <linux/pm.h>
+#include <linux/sizes.h>
 #include <linux/suspend.h>
 
 #include <asm/bootinfo.h>
@@ -22,31 +23,6 @@
 #include <asm/reboot.h>
 #include <asm/time.h>
 
-#define JZ4740_EMC_BASE_ADDR 0x13010000
-
-#define JZ4740_EMC_SDRAM_CTRL 0x80
-
-static void __init jz4740_detect_mem(void)
-{
-	void __iomem *jz_emc_base;
-	u32 ctrl, bus, bank, rows, cols;
-	phys_addr_t size;
-
-	jz_emc_base = ioremap(JZ4740_EMC_BASE_ADDR, 0x100);
-	ctrl = readl(jz_emc_base + JZ4740_EMC_SDRAM_CTRL);
-	bus = 2 - ((ctrl >> 31) & 1);
-	bank = 1 + ((ctrl >> 19) & 1);
-	cols = 8 + ((ctrl >> 26) & 7);
-	rows = 11 + ((ctrl >> 20) & 3);
-	printk(KERN_DEBUG
-		"SDRAM preconfigured: bus:%u bank:%u rows:%u cols:%u\n",
-		bus, bank, rows, cols);
-	iounmap(jz_emc_base);
-
-	size = 1 << (bus + bank + cols + rows);
-	add_memory_region(0, size, BOOT_MEM_RAM);
-}
-
 static unsigned long __init get_board_mach_type(const void *fdt)
 {
 	if (!fdt_node_check_compatible(fdt, 0, "ingenic,x2000"))
@@ -68,13 +44,16 @@ static unsigned long __init get_board_mach_type(const void *fdt)
 void __init plat_mem_setup(void)
 {
 	void *dtb = (void *)fw_passed_dtb;
-	int offset;
 
 	__dt_setup_arch(dtb);
 
-	offset = fdt_path_offset(dtb, "/memory");
-	if (offset < 0)
-		jz4740_detect_mem();
+	/*
+	 * Old devicetree files for the qi,lb60 board did not have a /memory
+	 * node. Hardcode the memory info here.
+	 */
+	if (!fdt_node_check_compatible(dtb, 0, "qi,lb60") &&
+	    fdt_path_offset(dtb, "/memory") < 0)
+		early_init_dt_add_memory_arch(0, SZ_32M);
 
 	mips_machtype = get_board_mach_type(dtb);
 }
-- 
2.27.0

Re: [PATCH 1/4] MIPS: head.S: Init fw_passed_dtb to builtin DTB

[Thomas Bogendoerfer]

On Thu, Jul 30, 2020 at 06:12:30PM +0200, Paul Cercueil wrote:
> Init the 'fw_passed_dtb' pointer to the buit-in Device Tree blob when it
> has been compiled in with CONFIG_BUILTIN_DTB.
> 
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> ---
>  arch/mips/kernel/head.S | 6 ++++++
>  1 file changed, 6 insertions(+)

patches 1-4 applied to mips-next.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]