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Date:   Fri, 21 Aug 2020 09:47:05 +0200
From:   Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To:     Florian Fainelli <f.fainelli@gmail.com>
Cc:     linux-mips@linux-mips.org, Huacai Chen <chenhc@lemote.com>,
        Paul Burton <paulburton@kernel.org>,
        Jiaxun Yang <jiaxun.yang@flygoat.com>,
        Mike Rapoport <rppt@kernel.org>,
        Liangliang Huang <huanglllzu@gmail.com>,
        Oleksij Rempel <linux@rempel-privat.de>,
        Kamal Dasu <kdasu.kdev@gmail.com>,
        Ralf Baechle <ralf@linux-mips.org>,
        "open list:BROADCOM BMIPS MIPS ARCHITECTURE" 
        <bcm-kernel-feedback-list@broadcom.com>,
        "open list:BROADCOM BMIPS MIPS ARCHITECTURE" 
        <linux-mips@vger.kernel.org>,
        open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH mips-fixes 0/2] MIPS: BMIPS: couple of fixes
Message-ID: <20200821074705.GC8336@alpha.franken.de>
References: <20200819182645.30132-1-f.fainelli@gmail.com>
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On Wed, Aug 19, 2020 at 11:26:43AM -0700, Florian Fainelli wrote:
> Hi Thomas,
> 
> These two patches are fixes for the BMIPS5000/5200 CPU cores which were
> missing an inclusive physical cache setting from the cpuinfo structure
> and we would not be calling CPU specific initialization for secondarey
> cores on the second hardware thread.
> 
> Thanks!
> 
> Florian Fainelli (2):
>   MIPS: mm: BMIPS5000 has inclusive physical caches
>   MIPS: BMIPS: Also call bmips_cpu_setup() for secondary cores
> 
>  arch/mips/kernel/smp-bmips.c | 2 ++
>  arch/mips/mm/c-r4k.c         | 4 ++++
>  2 files changed, 6 insertions(+)

series applied to mips-fixes.

Thomas.

-- 
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