From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 11/12] MIPS: Get rid of CAVIUM_OCTEON_DCACHE_PREFETCH_WAR
Date: Mon, 24 Aug 2020 18:32:53 +0200 [thread overview]
Message-ID: <20200824163257.44533-12-tsbogend@alpha.franken.de> (raw)
In-Reply-To: <20200824163257.44533-1-tsbogend@alpha.franken.de>
CAVIUM_OCTEON_DCACHE_PREFETCH_WAR is a check for Octeon model CN6XXXX.
By using the version check we can remove the define.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
arch/mips/cavium-octeon/setup.c | 2 +-
arch/mips/include/asm/mach-cavium-octeon/war.h | 3 ---
arch/mips/mm/uasm.c | 2 +-
3 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 4f34d92b52f9..8a357cb068c2 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -1126,7 +1126,7 @@ EXPORT_SYMBOL(prom_putchar);
void __init prom_free_prom_memory(void)
{
- if (CAVIUM_OCTEON_DCACHE_PREFETCH_WAR) {
+ if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) {
/* Check for presence of Core-14449 fix. */
u32 insn;
u32 *foo;
diff --git a/arch/mips/include/asm/mach-cavium-octeon/war.h b/arch/mips/include/asm/mach-cavium-octeon/war.h
index 616de70e697c..ba6df0a186e9 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/war.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/war.h
@@ -9,7 +9,4 @@
#ifndef __ASM_MIPS_MACH_CAVIUM_OCTEON_WAR_H
#define __ASM_MIPS_MACH_CAVIUM_OCTEON_WAR_H
-#define CAVIUM_OCTEON_DCACHE_PREFETCH_WAR \
- OCTEON_IS_MODEL(OCTEON_CN6XXX)
-
#endif /* __ASM_MIPS_MACH_CAVIUM_OCTEON_WAR_H */
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index c56f129c9a4b..81dd226d6b6b 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -394,7 +394,7 @@ I_u2u1u3(_lddir)
void uasm_i_pref(u32 **buf, unsigned int a, signed int b,
unsigned int c)
{
- if (CAVIUM_OCTEON_DCACHE_PREFETCH_WAR && a <= 24 && a != 5)
+ if (OCTEON_IS_MODEL(OCTEON_CN6XXX) && a <= 24 && a != 5)
/*
* As per erratum Core-14449, replace prefetches 0-4,
* 6-24 with 'pref 28'.
--
2.16.4
next prev parent reply other threads:[~2020-08-24 16:34 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-24 16:32 [PATCH 00/12] Convert WAR defines to config options Thomas Bogendoerfer
2020-08-24 16:32 ` [PATCH 01/12] MIPS: Convert R4600_V1_INDEX_ICACHEOP into a config option Thomas Bogendoerfer
2020-08-24 16:32 ` [PATCH 02/12] MIPS: Convert R4600_V1_HIT_CACHEOP " Thomas Bogendoerfer
2020-08-24 16:32 ` [PATCH 03/12] MIPS: Convert R4600_V2_HIT_CACHEOP " Thomas Bogendoerfer
2020-08-24 16:32 ` [PATCH 04/12] MIPS: Remove MIPS4K_ICACHE_REFILL_WAR and MIPS_CACHE_SYNC_WAR Thomas Bogendoerfer
2020-08-24 16:32 ` [PATCH 05/12] MIPS: Convert TX49XX_ICACHE_INDEX_INV into a config option Thomas Bogendoerfer
2020-08-24 16:32 ` [PATCH 06/12] MIPS: Convert ICACHE_REFILLS_WORKAROUND_WAR " Thomas Bogendoerfer
2020-08-24 16:32 ` [PATCH 07/12] MIPS: Convert R10000_LLSC_WAR info " Thomas Bogendoerfer
2020-08-24 16:32 ` [PATCH 08/12] MIPS: Convert MIPS34K_MISSED_ITLB_WAR into " Thomas Bogendoerfer
2020-08-24 16:32 ` [PATCH 09/12] MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDS Thomas Bogendoerfer
2020-08-24 16:32 ` [PATCH 10/12] MIPS: Get rid of BCM1250_M3_WAR Thomas Bogendoerfer
2020-08-24 16:32 ` Thomas Bogendoerfer [this message]
2020-08-24 16:32 ` [PATCH 12/12] MIPS: Remove mach-*/war.h Thomas Bogendoerfer
2020-08-24 17:10 ` [PATCH 00/12] Convert WAR defines to config options Florian Fainelli
2020-08-24 17:28 ` Thomas Bogendoerfer
2020-08-24 20:37 ` Florian Fainelli
2020-09-09 12:10 ` Thomas Bogendoerfer
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