From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] MIPS: SGI-IP28: disable use of ll/sc in kernel
Date: Thu, 8 Oct 2020 11:19:25 +0200 [thread overview]
Message-ID: <20201008091925.GB6481@alpha.franken.de> (raw)
In-Reply-To: <20201007101704.110101-1-tsbogend@alpha.franken.de>
On Wed, Oct 07, 2020 at 12:17:04PM +0200, Thomas Bogendoerfer wrote:
> SGI-IP28 systems only use broken R10k rev 2.5 CPUs, which could lock
> up, if ll/sc sequences are issued in certain order. Since those systems
> are all non-SMP, we can disable ll/sc usage in kernel.
>
> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
> ---
> arch/mips/include/asm/mach-ip28/cpu-feature-overrides.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
applied to mips-next.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
prev parent reply other threads:[~2020-10-08 9:19 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-07 10:17 [PATCH] MIPS: SGI-IP28: disable use of ll/sc in kernel Thomas Bogendoerfer
2020-10-08 9:19 ` Thomas Bogendoerfer [this message]
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