From: Rafael David Tinoco <rafael.tinoco@linaro.org>
To: "Kirill A. Shutemov" <kirill@shutemov.name>
Cc: Rafael David Tinoco <rafael.tinoco@linaro.org>,
Russell King <linux@armlinux.org.uk>,
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Subject: Re: [PATCH] mm/zsmalloc.c: Fix zsmalloc 32-bit PAE support
Date: Mon, 10 Dec 2018 14:48:25 -0200 [thread overview]
Message-ID: <32747ea1-7437-8055-a4f5-9f22378e57ae@linaro.org> (raw)
In-Reply-To: <20181210151506.phyjkfcg3skogtyh@kshutemo-mobl1>
On 12/10/18 1:15 PM, Kirill A. Shutemov wrote:
> On Mon, Dec 10, 2018 at 12:21:05PM -0200, Rafael David Tinoco wrote:
>> diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm/pgtable_64_types.h
>> index 84bd9bdc1987..d808cfde3d19 100644
>> --- a/arch/x86/include/asm/pgtable_64_types.h
>> +++ b/arch/x86/include/asm/pgtable_64_types.h
>> @@ -64,8 +64,6 @@ extern unsigned int ptrs_per_p4d;
>> #define P4D_SIZE (_AC(1, UL) << P4D_SHIFT)
>> #define P4D_MASK (~(P4D_SIZE - 1))
>>
>> -#define MAX_POSSIBLE_PHYSMEM_BITS 52
>> -
>> #else /* CONFIG_X86_5LEVEL */
>>
>> /*
>> @@ -154,4 +152,6 @@ extern unsigned int ptrs_per_p4d;
>>
>> #define PGD_KERNEL_START ((PAGE_SIZE / 2) / sizeof(pgd_t))
>>
>> +#define MAX_POSSIBLE_PHYSMEM_BITS (pgtable_l5_enabled() ? 52 : 46)
>> +
>
> ...
>
>> #endif /* _ASM_X86_PGTABLE_64_DEFS_H */
>> diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c
>> index 0787d33b80d8..132c20b6fd4f 100644
>> --- a/mm/zsmalloc.c
>> +++ b/mm/zsmalloc.c
>
> ...
>
>> @@ -116,6 +100,25 @@
>> */
>> #define OBJ_ALLOCATED_TAG 1
>> #define OBJ_TAG_BITS 1
>> +
>> +/*
>> + * MAX_POSSIBLE_PHYSMEM_BITS should be defined by all archs using zsmalloc:
>> + * Trying to guess it from MAX_PHYSMEM_BITS, or considering it BITS_PER_LONG,
>> + * proved to be wrong by not considering PAE capabilities, or using SPARSEMEM
>> + * only headers, leading to bad object encoding due to object index overflow.
>> + */
>> +#ifndef MAX_POSSIBLE_PHYSMEM_BITS
>> + #define MAX_POSSIBLE_PHYSMEM_BITS BITS_PER_LONG
>> + #error "MAX_POSSIBLE_PHYSMEM_BITS HAS to be defined by arch using zsmalloc";
>> +#else
>> + #ifndef CONFIG_64BIT
>> + #if (MAX_POSSIBLE_PHYSMEM_BITS >= (BITS_PER_LONG + PAGE_SHIFT - OBJ_TAG_BITS))
>> + #error "MAX_POSSIBLE_PHYSMEM_BITS is wrong for this arch";
>> + #endif
>> + #endif
>> +#endif
>> +
>> +#define _PFN_BITS (MAX_POSSIBLE_PHYSMEM_BITS - PAGE_SHIFT)
>> #define OBJ_INDEX_BITS (BITS_PER_LONG - _PFN_BITS - OBJ_TAG_BITS)
>> #define OBJ_INDEX_MASK ((_AC(1, UL) << OBJ_INDEX_BITS) - 1)
>
> Have you tested it with CONFIG_X86_5LEVEL=y?
>
> ASAICS, the patch makes OBJ_INDEX_BITS and what depends from it dynamic --
> it depends what paging mode we are booting in. ZS_SIZE_CLASSES depends
> indirectly on OBJ_INDEX_BITS and I don't see how struct zs_pool definition
> can compile with dynamic ZS_SIZE_CLASSES.
>
> Hm?
>
You're right, terribly sorry. This was a last time change.
mm/zsmalloc.c:256:21: error: variably modified ‘size_class’ at file scope
I'll revisit the patch. Any other comments are welcome.
Thank you
next prev parent reply other threads:[~2018-12-10 16:48 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-10 14:21 [PATCH] mm/zsmalloc.c: Fix zsmalloc 32-bit PAE support Rafael David Tinoco
2018-12-10 14:35 ` Robin Murphy
2018-12-10 15:05 ` Russell King - ARM Linux
2018-12-10 16:53 ` Rafael David Tinoco
2018-12-10 15:15 ` Kirill A. Shutemov
2018-12-10 16:48 ` Rafael David Tinoco [this message]
2018-12-13 6:17 ` kbuild test robot
2018-12-13 7:27 ` kbuild test robot
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