From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: "Bibo Mao" <maobibo@loongson.cn>,
"Thomas Bogendoerfer" <tsbogend@alpha.franken.de>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Huacai Chen" <chenhc@lemote.com>,
"Andrew Morton" <akpm@linux-foundation.org>,
"Paul Burton" <paulburton@kernel.org>,
"Dmitry Korotin" <dkorotin@wavecomp.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Stafford Horne" <shorne@gmail.com>,
"Steven Price" <steven.price@arm.com>,
"Anshuman Khandual" <anshuman.khandual@arm.com>
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
Mike Rapoport <rppt@linux.ibm.com>,
"Maciej W. Rozycki" <macro@wdc.com>,
linux-mm@kvack.org, David Hildenbrand <david@redhat.com>
Subject: Re: [PATCH v6 1/4] MIPS: Do not flush tlb page when updating PTE entry
Date: Mon, 25 May 2020 11:12:25 +0300 [thread overview]
Message-ID: <79778fc3-c029-272b-358e-4f8f8e5772d3@cogentembedded.com> (raw)
In-Reply-To: <1590375160-6997-1-git-send-email-maobibo@loongson.cn>
Hello!
On 25.05.2020 5:52, Bibo Mao wrote:
> It is not necessary to flush tlb page on all CPUs if suitable PTE
> entry exists already during page fault handling, just updating
> TLB is fine.
>
> Here redefine flush_tlb_fix_spurious_fault as empty on MIPS system.
Need empty line here.
> V6:
> - Add update_mmu_tlb function as empty on all platform except mips
> system, we use this function to update local tlb for page fault
> smp-race handling
> V5:
> - define update_mmu_cache function specified on MIPS platform, and
> add page fault smp-race stats info
> V4:
> - add pte_sw_mkyoung function to implement readable privilege, and
> this function is only in effect on MIPS system.
> - add page valid bit judgement in function pte_modify
> V3:
> - add detailed changelog, modify typo issue in patch V2
> v2:
> - split flush_tlb_fix_spurious_fault and tlb update into two patches
> - comments typo modification
> - separate tlb update and add pte readable privilege into two patches
It was a bad idea to keep the version change log in the 1st patch only,
we have either cover letter for that, or all the individual patches...
> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[...]
MBR, Sergei
next prev parent reply other threads:[~2020-05-25 8:12 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-25 2:52 [PATCH v6 1/4] MIPS: Do not flush tlb page when updating PTE entry Bibo Mao
2020-05-25 2:52 ` [PATCH v6 2/4] mm/memory.c: Update local TLB if PTE entry exists Bibo Mao
2020-05-25 21:43 ` Andrew Morton
2020-05-25 2:52 ` [PATCH v6 3/4] mm/memory.c: Add memory read privilege on page fault handling Bibo Mao
2020-05-25 21:44 ` Andrew Morton
2020-05-27 1:05 ` maobibo
2020-05-27 7:10 ` Thomas Bogendoerfer
2020-05-25 2:52 ` [PATCH v6 4/4] MIPS: mm: add page valid judgement in function pte_modify Bibo Mao
2020-05-25 8:12 ` Sergei Shtylyov [this message]
2020-05-25 8:31 ` [PATCH v6 1/4] MIPS: Do not flush tlb page when updating PTE entry Sergei Shtylyov
2020-05-27 1:07 ` maobibo
2020-05-25 21:42 ` Andrew Morton
2020-05-27 1:06 ` maobibo
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