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* [PATCH v3 0/8] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more)
@ 2019-11-24 11:40 H. Nikolaus Schaller
  2019-11-24 11:40 ` [PATCH v3 1/8] dt-bindings: add img,pvrsgx.yaml for Imagination GPUs H. Nikolaus Schaller
                   ` (7 more replies)
  0 siblings, 8 replies; 14+ messages in thread
From: H. Nikolaus Schaller @ 2019-11-24 11:40 UTC (permalink / raw)
  To: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Benoît Cousson, Tony Lindgren, Paul Cercueil, Ralf Baechle,
	Paul Burton, James Hogan
  Cc: dri-devel, devicetree, linux-kernel, linux-omap,
	openpvrsgx-devgroup, letux-kernel, kernel, linux-mips,
	H. Nikolaus Schaller

* reworked YAML format with help by Rob Herring
* removed .txt binding document
* change compatible "ti,am335x-sgx" to "ti,am3352-sgx" - suggested by Tony Lindgren

PATCH V2 2019-11-07 12:06:17:
* tried to convert bindings to YAML format - suggested by Rob Herring
* added JZ4780 DTS node (proven to load the driver)
* removed timer and img,cores properties until we know we really need them - suggested by Rob Herring

PATCH V1 2019-10-18 20:46:35:

This patch series defines child nodes for the SGX5xx interface inside
different SoC so that a driver can be found and probed by the
compatible strings and can retrieve information about the SGX revision
that is included in a specific SoC. It also defines the interrupt number
to be used by the SGX driver.

There is currently no mainline driver for these GPUs, but a project [1]
is ongoing with the goal to get the open-source part as provided by TI/IMG
and others into drivers/gpu/drm/pvrsgx.

The kernel modules built from this project have successfully demonstrated
to work with the DTS definitions from this patch set on AM335x BeagleBone
Black, DM3730 and OMAP5 Pyra and Droid 4. They partially work on OMAP3530 and
PandaBoard ES but that is likely a problem in the kernel driver or the
(non-free) user-space libraries and binaries.

Wotk for JZ4780 (CI20 board) is in progress and there is potential to extend
this work to e.g. BananaPi-M3 (A83) and  some Intel Poulsbo and CedarView
devices.

[1]: https://github.com/openpvrsgx-devgroup


H. Nikolaus Schaller (8):
  dt-bindings: add img,pvrsgx.yaml for Imagination GPUs
  ARM: DTS: am33xx: add sgx gpu child node
  ARM: DTS: am3517: add sgx gpu child node
  ARM: DTS: omap3: add sgx gpu child node
  ARM: DTS: omap36xx: add sgx gpu child node
  ARM: DTS: omap4: add sgx gpu child node
  ARM: DTS: omap5: add sgx gpu child node
  MIPS: DTS: jz4780: add sgx gpu node

 .../devicetree/bindings/gpu/img,pvrsgx.yaml   | 83 +++++++++++++++++++
 arch/arm/boot/dts/am33xx.dtsi                 | 38 ++++++++-
 arch/arm/boot/dts/am3517.dtsi                 | 11 +--
 arch/arm/boot/dts/omap34xx.dtsi               | 11 +--
 arch/arm/boot/dts/omap36xx.dtsi               | 11 +--
 arch/arm/boot/dts/omap4.dtsi                  |  9 +-
 arch/arm/boot/dts/omap4470.dts                | 15 ++++
 arch/arm/boot/dts/omap5.dtsi                  |  9 +-
 arch/mips/boot/dts/ingenic/jz4780.dtsi        | 11 +++
 9 files changed, 171 insertions(+), 27 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml
 create mode 100644 arch/arm/boot/dts/omap4470.dts

-- 
2.23.0


^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v3 1/8] dt-bindings: add img,pvrsgx.yaml for Imagination GPUs
  2019-11-24 11:40 [PATCH v3 0/8] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more) H. Nikolaus Schaller
@ 2019-11-24 11:40 ` H. Nikolaus Schaller
  2019-12-05 17:01   ` Rob Herring
  2019-11-24 11:40 ` [PATCH v3 2/8] ARM: DTS: am33xx: add sgx gpu child node H. Nikolaus Schaller
                   ` (6 subsequent siblings)
  7 siblings, 1 reply; 14+ messages in thread
From: H. Nikolaus Schaller @ 2019-11-24 11:40 UTC (permalink / raw)
  To: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Benoît Cousson, Tony Lindgren, Paul Cercueil, Ralf Baechle,
	Paul Burton, James Hogan
  Cc: dri-devel, devicetree, linux-kernel, linux-omap,
	openpvrsgx-devgroup, letux-kernel, kernel, linux-mips,
	H. Nikolaus Schaller

The Imagination PVR/SGX GPU is part of several SoC from
multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo
and others.

With this binding, we describe how the SGX processor is
interfaced to the SoC (registers, interrupt etc.).

In most cases, Clock, Reset and power management is handled
by a parent node or elsewhere.

Tested by make dt_binding_check dtbs_check

Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
---
 .../devicetree/bindings/gpu/img,pvrsgx.yaml   | 83 +++++++++++++++++++
 1 file changed, 83 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml

diff --git a/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml
new file mode 100644
index 000000000000..fe206a53cbe1
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpu/img,pvrsgx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Imagination PVR/SGX GPU
+
+maintainers:
+  - H. Nikolaus Schaller <hns@goldelico.com>
+
+description: |+
+  This binding describes the Imagination SGX5 series of 3D accelerators which
+  are found in several different SoC like TI OMAP, Sitara, Ingenic JZ4780,
+  Allwinner A83, and Intel Poulsbo and CedarView and more.
+
+  For an almost complete list see: https://en.wikipedia.org/wiki/PowerVR#Implementations
+  
+  Only the Imagination SGX530, SGX540 and SGX544 GPUs are currently covered by
+  this binding but the extension of the pattern is straightforward.
+  
+  The SGX node is usually a child node of some DT node belonging to the SoC
+  which handles clocks, reset and general address space mapping of the SGX
+  register area.
+
+properties:
+  compatible:
+    enum:
+    # BeagleBoard ABC, OpenPandora 600MHz
+      - ti,omap3-sgx530-121, img,sgx530-121, img,sgx530, img,sgx5
+    # BeagleBoard XM, GTA04, OpenPandora 1GHz
+      - ti,omap3-sgx530-125, img,sgx530-125, img,sgx530, img,sgx5
+    # BeagleBone Black
+      - ti,am3352-sgx530-125, img,sgx530-125, img,sgx530, img,sgx5
+    # Pandaboard, Pandaboard ES
+      - ti,omap4-sgx540-120, img,sgx540-120, img,sgx540, img,sgx5
+      - ti,omap4-sgx544-112, img,sgx544-112, img,sgx544, img,sgx5
+    # OMAP5 UEVM, Pyra Handheld
+      - ti,omap5-sgx544-116, img,sgx544-116, img,sgx544, img,sgx5
+      - ti,dra7-sgx544-116, img,sgx544-116, img,sgx544, img,sgx5
+    # CI20
+      - ingenic,jz4780-sgx540-120, img,sgx540-120, img,sgx540, img,sgx5
+    # the following entries are not validated with real hardware
+    # more TI
+      - ti,am3517-sgx530-125, img,sgx530-125, img,sgx530, img,sgx5
+      - ti,am4-sgx530-125, img,sgx530-125, img,sgx530, img,sgx5
+      - ti,ti81xx-sgx530-125, img,sgx530-125, img,sgx530, img,sgx5
+    # Banana-Pi-M3 (Allwinner A83T)
+      - allwinner,sun8i-a83t-sgx544-116, img,sgx544-116, img,sgx544, img,sgx5
+    # Atom Z5xx
+      - intel,poulsbo-gma500-sgx535, img,sgx535-116, img,sgx535, img,sgx5
+    # Atom Z24xx
+      - intel,medfield-gma-sgx540, img,sgx540-116, img,sgx540, img,sgx5
+    # Atom N2600, D2500
+      - intel,cedarview-gma3600-sgx545, img,sgx545-116, img,sgx545, img,sgx5
+
+  reg:
+    maxItems: 1
+    description: physical base address and length of the register area
+
+  interrupts:
+    maxItems: 1
+    description: interrupt line from SGX subsystem to core processor
+
+  clocks:
+    description: optional clocks
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+examples:
+  - |+
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    gpu@fe00 {
+      compatible = "ti,omap-omap5-sgx544-116", "img,sgx544-116", "img,sgx544", "img,sgx5";
+      reg = <0xfe00 0x200>;
+      interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+    };
+
+...
-- 
2.23.0


^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v3 2/8] ARM: DTS: am33xx: add sgx gpu child node
  2019-11-24 11:40 [PATCH v3 0/8] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more) H. Nikolaus Schaller
  2019-11-24 11:40 ` [PATCH v3 1/8] dt-bindings: add img,pvrsgx.yaml for Imagination GPUs H. Nikolaus Schaller
@ 2019-11-24 11:40 ` H. Nikolaus Schaller
  2019-11-24 11:40 ` [PATCH v3 3/8] ARM: DTS: am3517: " H. Nikolaus Schaller
                   ` (5 subsequent siblings)
  7 siblings, 0 replies; 14+ messages in thread
From: H. Nikolaus Schaller @ 2019-11-24 11:40 UTC (permalink / raw)
  To: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Benoît Cousson, Tony Lindgren, Paul Cercueil, Ralf Baechle,
	Paul Burton, James Hogan
  Cc: dri-devel, devicetree, linux-kernel, linux-omap,
	openpvrsgx-devgroup, letux-kernel, kernel, linux-mips,
	H. Nikolaus Schaller

and add timer and interrupt

Tested-by: H. Nikolaus Schaller <hns@goldelico.com> # BeagleBone Black
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
---
 arch/arm/boot/dts/am33xx.dtsi | 38 +++++++++++++++++++++++++++++++----
 1 file changed, 34 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index a9d848d50b20..1fbc8a2cc7fd 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -480,13 +480,43 @@
 			#size-cells = <1>;
 			ranges = <0 0x56000000 0x1000000>;
 
-			/*
-			 * Closed source PowerVR driver, no child device
-			 * binding or driver in mainline
-			 */
+			sgx: gpu@0 {
+				compatible = "ti,am3352-sgx530-125", "img,sgx530-125", "img,sgx530";
+				reg = <0x00 0x1000000>;	/* 16 MB */
+				interrupts = <37>;
+			};
 		};
 	};
 };
 
 #include "am33xx-l4.dtsi"
 #include "am33xx-clocks.dtsi"
+
+&prcm {
+	prm_per: prm@c00 {
+		compatible = "ti,am3-prm-inst";
+		reg = <0xc00 0x100>;
+		#reset-cells = <1>;
+		clocks = <&pruss_ocp_clkctrl AM3_PRUSS_OCP_PRUSS_CLKCTRL 0>;
+	};
+
+	prm_wkup: prm@d00 {
+		compatible = "ti,am3-prm-inst";
+		reg = <0xd00 0x100>;
+		#reset-cells = <1>;
+		clocks = <&l4_wkup_clkctrl AM3_WKUP_M3_CLKCTRL 0>;
+	};
+
+	prm_device: prm@f00 {
+		compatible = "ti,am3-prm-inst";
+		reg = <0xf00 0x100>;
+		#reset-cells = <1>;
+	};
+
+	prm_gfx: prm@1100 {
+		compatible = "ti,am3-prm-inst";
+		reg = <0x1100 0x100>;
+		#reset-cells = <1>;
+		clocks = <&gfx_l3_clkctrl AM3_GFX_CLKCTRL 0>;
+	};
+};
-- 
2.23.0


^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v3 3/8] ARM: DTS: am3517: add sgx gpu child node
  2019-11-24 11:40 [PATCH v3 0/8] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more) H. Nikolaus Schaller
  2019-11-24 11:40 ` [PATCH v3 1/8] dt-bindings: add img,pvrsgx.yaml for Imagination GPUs H. Nikolaus Schaller
  2019-11-24 11:40 ` [PATCH v3 2/8] ARM: DTS: am33xx: add sgx gpu child node H. Nikolaus Schaller
@ 2019-11-24 11:40 ` " H. Nikolaus Schaller
  2019-11-24 11:40 ` [PATCH v3 4/8] ARM: DTS: omap3: " H. Nikolaus Schaller
                   ` (4 subsequent siblings)
  7 siblings, 0 replies; 14+ messages in thread
From: H. Nikolaus Schaller @ 2019-11-24 11:40 UTC (permalink / raw)
  To: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Benoît Cousson, Tony Lindgren, Paul Cercueil, Ralf Baechle,
	Paul Burton, James Hogan
  Cc: dri-devel, devicetree, linux-kernel, linux-omap,
	openpvrsgx-devgroup, letux-kernel, kernel, linux-mips,
	H. Nikolaus Schaller

and add interrupt.

Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
---
 arch/arm/boot/dts/am3517.dtsi | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
index bf3002009b00..48d5a250fd40 100644
--- a/arch/arm/boot/dts/am3517.dtsi
+++ b/arch/arm/boot/dts/am3517.dtsi
@@ -97,7 +97,7 @@
 		 * revision register instead of the unreadable OCP revision
 		 * register.
 		 */
-		sgx_module: target-module@50000000 {
+		target-module@50000000 {
 			compatible = "ti,sysc-omap2", "ti,sysc";
 			reg = <0x50000014 0x4>;
 			reg-names = "rev";
@@ -107,10 +107,11 @@
 			#size-cells = <1>;
 			ranges = <0 0x50000000 0x4000>;
 
-			/*
-			 * Closed source PowerVR driver, no child device
-			 * binding or driver in mainline
-			 */
+			sgx: gpu@0 {
+				compatible = "ti,am3517-sgx530-125", "img,sgx530-125", "img,sgx530";
+				reg = <0x0 0x4000>;
+				interrupts = <21>;
+			};
 		};
 	};
 };
-- 
2.23.0


^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v3 4/8] ARM: DTS: omap3: add sgx gpu child node
  2019-11-24 11:40 [PATCH v3 0/8] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more) H. Nikolaus Schaller
                   ` (2 preceding siblings ...)
  2019-11-24 11:40 ` [PATCH v3 3/8] ARM: DTS: am3517: " H. Nikolaus Schaller
@ 2019-11-24 11:40 ` " H. Nikolaus Schaller
  2019-11-24 11:40 ` [PATCH v3 5/8] ARM: DTS: omap36xx: " H. Nikolaus Schaller
                   ` (3 subsequent siblings)
  7 siblings, 0 replies; 14+ messages in thread
From: H. Nikolaus Schaller @ 2019-11-24 11:40 UTC (permalink / raw)
  To: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Benoît Cousson, Tony Lindgren, Paul Cercueil, Ralf Baechle,
	Paul Burton, James Hogan
  Cc: dri-devel, devicetree, linux-kernel, linux-omap,
	openpvrsgx-devgroup, letux-kernel, kernel, linux-mips,
	H. Nikolaus Schaller

and add interrupt

Tested-by: H. Nikolaus Schaller <hns@goldelico.com> # OpenPandora 600 MHz.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
---
 arch/arm/boot/dts/omap34xx.dtsi | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi
index 7b09cbee8bb8..9b050d71849b 100644
--- a/arch/arm/boot/dts/omap34xx.dtsi
+++ b/arch/arm/boot/dts/omap34xx.dtsi
@@ -111,7 +111,7 @@
 		 * are also different clocks, but we do not have any dts users
 		 * for it.
 		 */
-		sgx_module: target-module@50000000 {
+		target-module@50000000 {
 			compatible = "ti,sysc-omap2", "ti,sysc";
 			reg = <0x50000014 0x4>;
 			reg-names = "rev";
@@ -121,10 +121,11 @@
 			#size-cells = <1>;
 			ranges = <0 0x50000000 0x4000>;
 
-			/*
-			 * Closed source PowerVR driver, no child device
-			 * binding or driver in mainline
-			 */
+			sgx: gpu@0 {
+				compatible = "ti,omap3-sgx530-121", "img,sgx530-121", "img,sgx530";
+				reg = <0x0 0x4000>;	/* 64kB */
+				interrupts = <21>;
+			};
 		};
 	};
 
-- 
2.23.0


^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v3 5/8] ARM: DTS: omap36xx: add sgx gpu child node
  2019-11-24 11:40 [PATCH v3 0/8] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more) H. Nikolaus Schaller
                   ` (3 preceding siblings ...)
  2019-11-24 11:40 ` [PATCH v3 4/8] ARM: DTS: omap3: " H. Nikolaus Schaller
@ 2019-11-24 11:40 ` " H. Nikolaus Schaller
  2019-11-24 11:40 ` [PATCH v3 6/8] ARM: DTS: omap4: " H. Nikolaus Schaller
                   ` (2 subsequent siblings)
  7 siblings, 0 replies; 14+ messages in thread
From: H. Nikolaus Schaller @ 2019-11-24 11:40 UTC (permalink / raw)
  To: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Benoît Cousson, Tony Lindgren, Paul Cercueil, Ralf Baechle,
	Paul Burton, James Hogan
  Cc: dri-devel, devicetree, linux-kernel, linux-omap,
	openpvrsgx-devgroup, letux-kernel, kernel, linux-mips,
	H. Nikolaus Schaller

and add interrupt.

Tested-by: H. Nikolaus Schaller <hns@goldelico.com> # GTA04, BeagleBoard XM
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
---
 arch/arm/boot/dts/omap36xx.dtsi | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi
index 1e552f08f120..851d4abb943b 100644
--- a/arch/arm/boot/dts/omap36xx.dtsi
+++ b/arch/arm/boot/dts/omap36xx.dtsi
@@ -145,7 +145,7 @@
 		 * "ti,sysc-omap4" type register with just sidle and midle bits
 		 * available while omap34xx has "ti,sysc-omap2" type sysconfig.
 		 */
-		sgx_module: target-module@50000000 {
+		target-module@50000000 {
 			compatible = "ti,sysc-omap4", "ti,sysc";
 			reg = <0x5000fe00 0x4>,
 			      <0x5000fe10 0x4>;
@@ -162,10 +162,11 @@
 			#size-cells = <1>;
 			ranges = <0 0x50000000 0x2000000>;
 
-			/*
-			 * Closed source PowerVR driver, no child device
-			 * binding or driver in mainline
-			 */
+			sgx: gpu@0 {
+				compatible = "ti,omap3-sgx530-125", "img,sgx530-125", "img,sgx530";
+				reg = <0x0 0x10000>;	/* 64kB */
+				interrupts = <21>;
+			};
 		};
 	};
 
-- 
2.23.0


^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v3 6/8] ARM: DTS: omap4: add sgx gpu child node
  2019-11-24 11:40 [PATCH v3 0/8] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more) H. Nikolaus Schaller
                   ` (4 preceding siblings ...)
  2019-11-24 11:40 ` [PATCH v3 5/8] ARM: DTS: omap36xx: " H. Nikolaus Schaller
@ 2019-11-24 11:40 ` " H. Nikolaus Schaller
  2019-11-24 11:40 ` [PATCH v3 7/8] ARM: DTS: omap5: " H. Nikolaus Schaller
  2019-11-24 11:40 ` [PATCH v3 8/8] MIPS: DTS: jz4780: add sgx gpu node H. Nikolaus Schaller
  7 siblings, 0 replies; 14+ messages in thread
From: H. Nikolaus Schaller @ 2019-11-24 11:40 UTC (permalink / raw)
  To: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Benoît Cousson, Tony Lindgren, Paul Cercueil, Ralf Baechle,
	Paul Burton, James Hogan
  Cc: dri-devel, devicetree, linux-kernel, linux-omap,
	openpvrsgx-devgroup, letux-kernel, kernel, linux-mips,
	H. Nikolaus Schaller

and add interrupt.

Since omap4420/30/60 and omap4470 come with different SGX variants
we need to introduce a new omap4470.dtsi. If an omap4470 board
does not want to use SGX it is no problem to still include
omap4460.dtsi.

Tested-by: H. Nikolaus Schaller <hns@goldelico.com> # PandaBoard ES
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
---
 arch/arm/boot/dts/omap4.dtsi   |  9 +++++----
 arch/arm/boot/dts/omap4470.dts | 15 +++++++++++++++
 2 files changed, 20 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/boot/dts/omap4470.dts

diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 7cc95bc1598b..4d5958fbe1ef 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -347,10 +347,11 @@
 			#size-cells = <1>;
 			ranges = <0 0x56000000 0x2000000>;
 
-			/*
-			 * Closed source PowerVR driver, no child device
-			 * binding or driver in mainline
-			 */
+			sgx: img@0 {
+				compatible = "ti,omap4-sgx540-120", "img,sgx540-120", "img,sgx540";
+				reg = <0x0 0x2000000>;	/* 32MB */
+				interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+			};
 		};
 
 		dss: dss@58000000 {
diff --git a/arch/arm/boot/dts/omap4470.dts b/arch/arm/boot/dts/omap4470.dts
new file mode 100644
index 000000000000..19b554612401
--- /dev/null
+++ b/arch/arm/boot/dts/omap4470.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Device Tree Source for OMAP4470 SoC
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+#include "omap4460.dtsi"
+
+&sgx {
+	compatible = "img,sgx544-112", "img,sgx544", "ti,omap-omap4-sgx544-112";
+};
-- 
2.23.0


^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v3 7/8] ARM: DTS: omap5: add sgx gpu child node
  2019-11-24 11:40 [PATCH v3 0/8] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more) H. Nikolaus Schaller
                   ` (5 preceding siblings ...)
  2019-11-24 11:40 ` [PATCH v3 6/8] ARM: DTS: omap4: " H. Nikolaus Schaller
@ 2019-11-24 11:40 ` " H. Nikolaus Schaller
  2019-11-24 11:40 ` [PATCH v3 8/8] MIPS: DTS: jz4780: add sgx gpu node H. Nikolaus Schaller
  7 siblings, 0 replies; 14+ messages in thread
From: H. Nikolaus Schaller @ 2019-11-24 11:40 UTC (permalink / raw)
  To: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Benoît Cousson, Tony Lindgren, Paul Cercueil, Ralf Baechle,
	Paul Burton, James Hogan
  Cc: dri-devel, devicetree, linux-kernel, linux-omap,
	openpvrsgx-devgroup, letux-kernel, kernel, linux-mips,
	H. Nikolaus Schaller

and add interrupt.

Tested-by: H. Nikolaus Schaller <hns@goldelico.com> # Pyra-Handheld.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
---
 arch/arm/boot/dts/omap5.dtsi | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 1fb7937638f0..333da4788088 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -274,10 +274,11 @@
 			#size-cells = <1>;
 			ranges = <0 0x56000000 0x2000000>;
 
-			/*
-			 * Closed source PowerVR driver, no child device
-			 * binding or driver in mainline
-			 */
+			sgx: gpu@0 {
+				compatible = "ti,omap5-sgx544-116", "img,sgx544-116", "img,sgx544";
+				reg = <0x0 0x10000>;
+				interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+			};
 		};
 
 		dss: dss@58000000 {
-- 
2.23.0


^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v3 8/8] MIPS: DTS: jz4780: add sgx gpu node
  2019-11-24 11:40 [PATCH v3 0/8] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more) H. Nikolaus Schaller
                   ` (6 preceding siblings ...)
  2019-11-24 11:40 ` [PATCH v3 7/8] ARM: DTS: omap5: " H. Nikolaus Schaller
@ 2019-11-24 11:40 ` H. Nikolaus Schaller
  2019-11-24 12:57   ` Paul Cercueil
  7 siblings, 1 reply; 14+ messages in thread
From: H. Nikolaus Schaller @ 2019-11-24 11:40 UTC (permalink / raw)
  To: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Benoît Cousson, Tony Lindgren, Paul Cercueil, Ralf Baechle,
	Paul Burton, James Hogan
  Cc: dri-devel, devicetree, linux-kernel, linux-omap,
	openpvrsgx-devgroup, letux-kernel, kernel, linux-mips,
	H. Nikolaus Schaller, Paul Boddie

and add interrupt and clocks.

Tested to build for CI20 board and load a (non-working) driver.

Suggested-by: Paul Boddie <paul@boddie.org.uk>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
---
 arch/mips/boot/dts/ingenic/jz4780.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index c54bd7cfec55..21ea5f4a405b 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -46,6 +46,17 @@
 		#clock-cells = <1>;
 	};
 
+	gpu: gpu@13040000 {
+		compatible = "ingenic,jz4780-sgx540-120", "img,sgx540-120", "img,sgx540", "img,sgx5";
+		reg = <0x13040000 0x4000>;
+
+		clocks = <&cgu JZ4780_CLK_GPU>;
+		clock-names = "gpu";
+
+		interrupt-parent = <&intc>;
+		interrupts = <63>;
+	};
+
 	tcu: timer@10002000 {
 		compatible = "ingenic,jz4780-tcu",
 			     "ingenic,jz4770-tcu",
-- 
2.23.0


^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v3 8/8] MIPS: DTS: jz4780: add sgx gpu node
  2019-11-24 11:40 ` [PATCH v3 8/8] MIPS: DTS: jz4780: add sgx gpu node H. Nikolaus Schaller
@ 2019-11-24 12:57   ` Paul Cercueil
  2019-11-24 17:48     ` Tony Lindgren
  0 siblings, 1 reply; 14+ messages in thread
From: Paul Cercueil @ 2019-11-24 12:57 UTC (permalink / raw)
  To: H. Nikolaus Schaller
  Cc: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Benoît Cousson, Tony Lindgren, Ralf Baechle, Paul Burton,
	James Hogan, dri-devel, devicetree, linux-kernel, linux-omap,
	openpvrsgx-devgroup, letux-kernel, kernel, linux-mips,
	Paul Boddie

Hi Nikolaus,


Le dim., nov. 24, 2019 at 12:40, H. Nikolaus Schaller 
<hns@goldelico.com> a écrit :
> and add interrupt and clocks.
> 
> Tested to build for CI20 board and load a (non-working) driver.
> 
> Suggested-by: Paul Boddie <paul@boddie.org.uk>
> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
> ---
>  arch/mips/boot/dts/ingenic/jz4780.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi 
> b/arch/mips/boot/dts/ingenic/jz4780.dtsi
> index c54bd7cfec55..21ea5f4a405b 100644
> --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
> +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
> @@ -46,6 +46,17 @@
>  		#clock-cells = <1>;
>  	};
> 
> +	gpu: gpu@13040000 {

We try to keep the nodes ordered by address, could you move this node 
where it belongs?

Thanks,
-Paul


> +		compatible = "ingenic,jz4780-sgx540-120", "img,sgx540-120", 
> "img,sgx540", "img,sgx5";
> +		reg = <0x13040000 0x4000>;
> +
> +		clocks = <&cgu JZ4780_CLK_GPU>;
> +		clock-names = "gpu";
> +
> +		interrupt-parent = <&intc>;
> +		interrupts = <63>;
> +	};
> +
>  	tcu: timer@10002000 {
>  		compatible = "ingenic,jz4780-tcu",
>  			     "ingenic,jz4770-tcu",
> --
> 2.23.0
> 



^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v3 8/8] MIPS: DTS: jz4780: add sgx gpu node
  2019-11-24 12:57   ` Paul Cercueil
@ 2019-11-24 17:48     ` Tony Lindgren
  2019-11-24 17:59       ` H. Nikolaus Schaller
  0 siblings, 1 reply; 14+ messages in thread
From: Tony Lindgren @ 2019-11-24 17:48 UTC (permalink / raw)
  To: Paul Cercueil
  Cc: H. Nikolaus Schaller, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Benoît Cousson, Ralf Baechle, Paul Burton,
	James Hogan, dri-devel, devicetree, linux-kernel, linux-omap,
	openpvrsgx-devgroup, letux-kernel, kernel, linux-mips,
	Paul Boddie

* Paul Cercueil <paul@crapouillou.net> [191124 12:58]:
> Le dim., nov. 24, 2019 at 12:40, H. Nikolaus Schaller <hns@goldelico.com> a
> écrit :
> > and add interrupt and clocks.
...
> > --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
> > +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
> > @@ -46,6 +46,17 @@
> >  		#clock-cells = <1>;
> >  	};
> > 
> > +	gpu: gpu@13040000 {
> 
> We try to keep the nodes ordered by address, could you move this node where
> it belongs?
...

> > +		compatible = "ingenic,jz4780-sgx540-120", "img,sgx540-120",
> > "img,sgx540", "img,sgx5";
> > +		reg = <0x13040000 0x4000>;
> > +
> > +		clocks = <&cgu JZ4780_CLK_GPU>;
> > +		clock-names = "gpu";

Just checking.. Is there something else to configure here
potentially in addition to the clocks?

That is, do we need to do some interconnect specific
configuration etc in addition to the clocks to have
runtime PM work for enabling and disabling sgx on
jz4780?

Regards,

Tony

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v3 8/8] MIPS: DTS: jz4780: add sgx gpu node
  2019-11-24 17:48     ` Tony Lindgren
@ 2019-11-24 17:59       ` H. Nikolaus Schaller
  2019-11-25 15:46         ` Tony Lindgren
  0 siblings, 1 reply; 14+ messages in thread
From: H. Nikolaus Schaller @ 2019-11-24 17:59 UTC (permalink / raw)
  To: Tony Lindgren, Paul Cercueil
  Cc: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland,
	Benoît Cousson, Ralf Baechle, Paul Burton, James Hogan,
	dri-devel, devicetree, Linux Kernel Mailing List, Linux-OMAP,
	OpenPVRSGX Linux Driver Group,
	Discussions about the Letux Kernel, kernel, linux-mips,
	Paul Boddie

Hi Paul, Tony,

> Am 24.11.2019 um 18:48 schrieb Tony Lindgren <tony@atomide.com>:
> 
> * Paul Cercueil <paul@crapouillou.net> [191124 12:58]:
>> Le dim., nov. 24, 2019 at 12:40, H. Nikolaus Schaller <hns@goldelico.com> a
>> écrit :
>>> and add interrupt and clocks.
> ...
>>> --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
>>> +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
>>> @@ -46,6 +46,17 @@
>>> 		#clock-cells = <1>;
>>> 	};
>>> 
>>> +	gpu: gpu@13040000 {
>> 
>> We try to keep the nodes ordered by address, could you move this node where
>> it belongs?
> ...

Yes, I have noted.

> 
>>> +		compatible = "ingenic,jz4780-sgx540-120", "img,sgx540-120",
>>> "img,sgx540", "img,sgx5";
>>> +		reg = <0x13040000 0x4000>;
>>> +
>>> +		clocks = <&cgu JZ4780_CLK_GPU>;
>>> +		clock-names = "gpu";
> 
> Just checking.. Is there something else to configure here
> potentially in addition to the clocks?

It doesn't look so. Unfortuantely there isn't much information
except a v3.18 kernel supported by the vendor and that one also
just has a gpu node with clock control.

> That is, do we need to do some interconnect specific
> configuration etc in addition to the clocks to have
> runtime PM work for enabling and disabling sgx on
> jz4780?

I think we have to leave that open for further study.

BR,
Nikolaus


^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v3 8/8] MIPS: DTS: jz4780: add sgx gpu node
  2019-11-24 17:59       ` H. Nikolaus Schaller
@ 2019-11-25 15:46         ` Tony Lindgren
  0 siblings, 0 replies; 14+ messages in thread
From: Tony Lindgren @ 2019-11-25 15:46 UTC (permalink / raw)
  To: H. Nikolaus Schaller
  Cc: Paul Cercueil, David Airlie, Daniel Vetter, Rob Herring,
	Mark Rutland, Benoît Cousson, Ralf Baechle, Paul Burton,
	James Hogan, dri-devel, devicetree, Linux Kernel Mailing List,
	Linux-OMAP, OpenPVRSGX Linux Driver Group,
	Discussions about the Letux Kernel, kernel, linux-mips,
	Paul Boddie

* H. Nikolaus Schaller <hns@goldelico.com> [191124 18:00]:
> Hi Paul, Tony,
> 
> > Am 24.11.2019 um 18:48 schrieb Tony Lindgren <tony@atomide.com>:
> > 
> > * Paul Cercueil <paul@crapouillou.net> [191124 12:58]:
> >> Le dim., nov. 24, 2019 at 12:40, H. Nikolaus Schaller <hns@goldelico.com> a
> >> écrit :
> >>> and add interrupt and clocks.
> > ...
> >>> --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
> >>> +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
> >>> @@ -46,6 +46,17 @@
> >>> 		#clock-cells = <1>;
> >>> 	};
> >>> 
> >>> +	gpu: gpu@13040000 {
> >> 
> >> We try to keep the nodes ordered by address, could you move this node where
> >> it belongs?
> > ...
> 
> Yes, I have noted.
> 
> > 
> >>> +		compatible = "ingenic,jz4780-sgx540-120", "img,sgx540-120",
> >>> "img,sgx540", "img,sgx5";
> >>> +		reg = <0x13040000 0x4000>;
> >>> +
> >>> +		clocks = <&cgu JZ4780_CLK_GPU>;
> >>> +		clock-names = "gpu";
> > 
> > Just checking.. Is there something else to configure here
> > potentially in addition to the clocks?
> 
> It doesn't look so. Unfortuantely there isn't much information
> except a v3.18 kernel supported by the vendor and that one also
> just has a gpu node with clock control.
> 
> > That is, do we need to do some interconnect specific
> > configuration etc in addition to the clocks to have
> > runtime PM work for enabling and disabling sgx on
> > jz4780?
> 
> I think we have to leave that open for further study.

OK for now, let's assume we just need to call
clk_enable/disable from the PM runtime functions if a
clock exists.

Regards,

Tony

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v3 1/8] dt-bindings: add img,pvrsgx.yaml for Imagination GPUs
  2019-11-24 11:40 ` [PATCH v3 1/8] dt-bindings: add img,pvrsgx.yaml for Imagination GPUs H. Nikolaus Schaller
@ 2019-12-05 17:01   ` Rob Herring
  0 siblings, 0 replies; 14+ messages in thread
From: Rob Herring @ 2019-12-05 17:01 UTC (permalink / raw)
  To: H. Nikolaus Schaller
  Cc: David Airlie, Daniel Vetter, Mark Rutland, Benoît Cousson,
	Tony Lindgren, Paul Cercueil, Ralf Baechle, Paul Burton,
	James Hogan, dri-devel, devicetree, linux-kernel, linux-omap,
	openpvrsgx-devgroup, letux-kernel, kernel, linux-mips

On Sun, Nov 24, 2019 at 12:40:21PM +0100, H. Nikolaus Schaller wrote:
> The Imagination PVR/SGX GPU is part of several SoC from
> multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo
> and others.
> 
> With this binding, we describe how the SGX processor is
> interfaced to the SoC (registers, interrupt etc.).
> 
> In most cases, Clock, Reset and power management is handled
> by a parent node or elsewhere.
> 
> Tested by make dt_binding_check dtbs_check
> 
> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
> ---
>  .../devicetree/bindings/gpu/img,pvrsgx.yaml   | 83 +++++++++++++++++++
>  1 file changed, 83 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml
> 
> diff --git a/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml
> new file mode 100644
> index 000000000000..fe206a53cbe1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml
> @@ -0,0 +1,83 @@
> +# SPDX-License-Identifier: GPL-2.0

Dual license new bindings: (GPL-2.0-only OR BSD-2-Clause)

> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/gpu/img,pvrsgx.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Imagination PVR/SGX GPU
> +
> +maintainers:
> +  - H. Nikolaus Schaller <hns@goldelico.com>
> +
> +description: |+
> +  This binding describes the Imagination SGX5 series of 3D accelerators which
> +  are found in several different SoC like TI OMAP, Sitara, Ingenic JZ4780,
> +  Allwinner A83, and Intel Poulsbo and CedarView and more.
> +
> +  For an almost complete list see: https://en.wikipedia.org/wiki/PowerVR#Implementations
> +  
> +  Only the Imagination SGX530, SGX540 and SGX544 GPUs are currently covered by
> +  this binding but the extension of the pattern is straightforward.
> +  
> +  The SGX node is usually a child node of some DT node belonging to the SoC
> +  which handles clocks, reset and general address space mapping of the SGX
> +  register area.
> +
> +properties:
> +  compatible:
> +    enum:
> +    # BeagleBoard ABC, OpenPandora 600MHz

I'd expect compatibles to be per SoC, not per board.

> +      - ti,omap3-sgx530-121, img,sgx530-121, img,sgx530, img,sgx5

4 compatibles is probably a bit much. Are there not any version or 
feature registers that some of this could be detected? If there are, I'd 
assume the middle 2 strings could be dropped. If not, drop the last one 
and just match on the 3rd string. It's not a long list.

> +    # BeagleBoard XM, GTA04, OpenPandora 1GHz
> +      - ti,omap3-sgx530-125, img,sgx530-125, img,sgx530, img,sgx5
> +    # BeagleBone Black
> +      - ti,am3352-sgx530-125, img,sgx530-125, img,sgx530, img,sgx5
> +    # Pandaboard, Pandaboard ES
> +      - ti,omap4-sgx540-120, img,sgx540-120, img,sgx540, img,sgx5
> +      - ti,omap4-sgx544-112, img,sgx544-112, img,sgx544, img,sgx5
> +    # OMAP5 UEVM, Pyra Handheld
> +      - ti,omap5-sgx544-116, img,sgx544-116, img,sgx544, img,sgx5
> +      - ti,dra7-sgx544-116, img,sgx544-116, img,sgx544, img,sgx5
> +    # CI20
> +      - ingenic,jz4780-sgx540-120, img,sgx540-120, img,sgx540, img,sgx5
> +    # the following entries are not validated with real hardware
> +    # more TI
> +      - ti,am3517-sgx530-125, img,sgx530-125, img,sgx530, img,sgx5
> +      - ti,am4-sgx530-125, img,sgx530-125, img,sgx530, img,sgx5
> +      - ti,ti81xx-sgx530-125, img,sgx530-125, img,sgx530, img,sgx5
> +    # Banana-Pi-M3 (Allwinner A83T)
> +      - allwinner,sun8i-a83t-sgx544-116, img,sgx544-116, img,sgx544, img,sgx5
> +    # Atom Z5xx
> +      - intel,poulsbo-gma500-sgx535, img,sgx535-116, img,sgx535, img,sgx5
> +    # Atom Z24xx
> +      - intel,medfield-gma-sgx540, img,sgx540-116, img,sgx540, img,sgx5
> +    # Atom N2600, D2500
> +      - intel,cedarview-gma3600-sgx545, img,sgx545-116, img,sgx545, img,sgx5
> +
> +  reg:
> +    maxItems: 1
> +    description: physical base address and length of the register area

No need to give a generic description of a standard property.

> +
> +  interrupts:
> +    maxItems: 1
> +    description: interrupt line from SGX subsystem to core processor

Same here.

> +
> +  clocks:
> +    description: optional clocks

Need to define how many and what they are. Or drop until you know.

> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts

Add:

additionalProperties: false

> +
> +examples:
> +  - |+
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +    gpu@fe00 {
> +      compatible = "ti,omap-omap5-sgx544-116", "img,sgx544-116", "img,sgx544", "img,sgx5";
> +      reg = <0xfe00 0x200>;
> +      interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> +    };
> +
> +...
> -- 
> 2.23.0
> 

^ permalink raw reply	[flat|nested] 14+ messages in thread

end of thread, back to index

Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-11-24 11:40 [PATCH v3 0/8] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more) H. Nikolaus Schaller
2019-11-24 11:40 ` [PATCH v3 1/8] dt-bindings: add img,pvrsgx.yaml for Imagination GPUs H. Nikolaus Schaller
2019-12-05 17:01   ` Rob Herring
2019-11-24 11:40 ` [PATCH v3 2/8] ARM: DTS: am33xx: add sgx gpu child node H. Nikolaus Schaller
2019-11-24 11:40 ` [PATCH v3 3/8] ARM: DTS: am3517: " H. Nikolaus Schaller
2019-11-24 11:40 ` [PATCH v3 4/8] ARM: DTS: omap3: " H. Nikolaus Schaller
2019-11-24 11:40 ` [PATCH v3 5/8] ARM: DTS: omap36xx: " H. Nikolaus Schaller
2019-11-24 11:40 ` [PATCH v3 6/8] ARM: DTS: omap4: " H. Nikolaus Schaller
2019-11-24 11:40 ` [PATCH v3 7/8] ARM: DTS: omap5: " H. Nikolaus Schaller
2019-11-24 11:40 ` [PATCH v3 8/8] MIPS: DTS: jz4780: add sgx gpu node H. Nikolaus Schaller
2019-11-24 12:57   ` Paul Cercueil
2019-11-24 17:48     ` Tony Lindgren
2019-11-24 17:59       ` H. Nikolaus Schaller
2019-11-25 15:46         ` Tony Lindgren

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