From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.7 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E195C73C6D for ; Wed, 10 Jul 2019 06:46:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 362902064A for ; Wed, 10 Jul 2019 06:46:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Dn2ACj9E" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726168AbfGJGqb (ORCPT ); Wed, 10 Jul 2019 02:46:31 -0400 Received: from mail-ot1-f68.google.com ([209.85.210.68]:33270 "EHLO mail-ot1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726111AbfGJGqb (ORCPT ); Wed, 10 Jul 2019 02:46:31 -0400 Received: by mail-ot1-f68.google.com with SMTP id q20so1097444otl.0; Tue, 09 Jul 2019 23:46:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=goA0pqDvekqqmxZQjkpFHCZBNwrKPP7M5GIjZbuPPQs=; b=Dn2ACj9EnzC10Mxhwl/GbLOGyx01LLVFuYvtNYMVexM46MKXlqDa9q/9MdvWqJVqR0 Vew3p7VZxbyZm3YfmpGi1m8fdc9zcfTpDR44iiEoXqqm+hcrsMpdTQfXA5jXE9DK11gs JMZfBexPsnQDrKIwm6ZAYlN5xjMp5FYHYmBCl4V6scUR1Rx5aizZcK73SnaAqEv+ddZG PhMwoKIRBgqJuSSC8LdZu0ZyDLEQhpGqTKjPG5G7LemRHVBbrwC34CkuDM/e11H0dIyU cnNyIzFGj/RMZVldwOCXxkRfao+FWo4+CGQt7D60vcpk7dLEGnzgWfFOQy2IafyyOU2L 1ANw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=goA0pqDvekqqmxZQjkpFHCZBNwrKPP7M5GIjZbuPPQs=; b=crHC6cjt9xtIA1B03GTiVnLof/zk8l8vLpC8jwOK68Xsr963o70GV9sW1cqzoliyfP w/C/Q42vmlkfVNTvve3iYE4Opwmz8KlBrAbUkIL4EEquKX/lHTfmQJwFaIfRxhfFVfML 1H3VJzpiKPr3wIvgBHpnCiT7FGWAuMc7lb6fjTK6mh4APmxSQypT6nV0X8NND7qO+jFS Gy6a6zgXk9wDROs6TrcDHS9T1A7cKtuEQ2jf0kqaINUceZlGXsfcl52Y5lnDDwpuRt9u eiiieTi+CcYJXk+bKFqKMZxnkqiX8It0WGFLAdWolNoDDVjMqaWI/yvva62IZ7/KZrxK CQAw== X-Gm-Message-State: APjAAAXoTW8QolsMVJYoVgfh4iwgTSrCvqegguWPBrY4NdVTw3EnrxLB sGrsMIs1Xp4w47jIeD6JS8jOlm2g7GxDnCVH16DE9g2GXB8= X-Google-Smtp-Source: APXvYqwIcnkw7X8a0akZ3pqEHKADUO9UWrI7tCnP1Lkr6+Qi6xyfm75eWXyJ5YW6We8QcIF6f6RH7/N25eLs1jSfvKU= X-Received: by 2002:a05:6830:1350:: with SMTP id r16mr21391473otq.84.1562741190094; Tue, 09 Jul 2019 23:46:30 -0700 (PDT) MIME-Version: 1.0 References: <20190709182018.23193-1-gch981213@gmail.com> <20190709182018.23193-5-gch981213@gmail.com> In-Reply-To: <20190709182018.23193-5-gch981213@gmail.com> From: Chuanhong Guo Date: Wed, 10 Jul 2019 14:46:18 +0800 Message-ID: Subject: Re: [PATCH 4/5] staging: mt7621-dts: add dt nodes for mt7621-pll To: "open list:COMMON CLK FRAMEWORK" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list , "open list:MIPS" , "open list:STAGING SUBSYSTEM" Cc: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Ralf Baechle , Paul Burton , James Hogan , John Crispin , Greg Kroah-Hartman , Weijie Gao , NeilBrown Content-Type: text/plain; charset="UTF-8" Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org On Wed, Jul 10, 2019 at 2:22 AM Chuanhong Guo wrote: > > This commit adds device-tree node for mt7621-pll and use its clock > accordingly. > > Signed-off-by: Chuanhong Guo Oops. Please ignore this single patch for now. I forgot to drop cpuclock node in drivers/staging/mt7621-dts/gbpc1.dts I'll resend this patch with changes for gbpc1.dts after the other four patches are applied. > --- > drivers/staging/mt7621-dts/mt7621.dtsi | 15 +++++++-------- > 1 file changed, 7 insertions(+), 8 deletions(-) > > diff --git a/drivers/staging/mt7621-dts/mt7621.dtsi b/drivers/staging/mt7621-dts/mt7621.dtsi > index a4c08110094b..12717f570ceb 100644 > --- a/drivers/staging/mt7621-dts/mt7621.dtsi > +++ b/drivers/staging/mt7621-dts/mt7621.dtsi > @@ -1,4 +1,5 @@ > #include > +#include > #include > > / { > @@ -27,12 +28,11 @@ > serial0 = &uartlite; > }; > > - cpuclock: cpuclock@0 { > - #clock-cells = <0>; > - compatible = "fixed-clock"; > + pll: pll { > + compatible = "mediatek,mt7621-pll", "syscon"; > > - /* FIXME: there should be way to detect this */ > - clock-frequency = <880000000>; > + #clock-cells = <1>; > + clock-output-names = "cpu", "bus"; > }; > > sysclock: sysclock@0 { > @@ -155,7 +155,6 @@ > compatible = "ns16550a"; > reg = <0xc00 0x100>; > > - clocks = <&sysclock>; > clock-frequency = <50000000>; > > interrupt-parent = <&gic>; > @@ -172,7 +171,7 @@ > compatible = "ralink,mt7621-spi"; > reg = <0xb00 0x100>; > > - clocks = <&sysclock>; > + clocks = <&pll MT7621_CLK_BUS>; > > resets = <&rstctrl 18>; > reset-names = "spi"; > @@ -372,7 +371,7 @@ > timer { > compatible = "mti,gic-timer"; > interrupts = ; > - clocks = <&cpuclock>; > + clocks = <&pll MT7621_CLK_CPU>; > }; > }; > > -- > 2.21.0 >