From: Arnd Bergmann <arnd@arndb.de>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Serge Semin <fancer.lancer@gmail.com>,
Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
Paul Burton <paulburton@kernel.org>,
Olof Johansson <olof@lixom.net>, Rob Herring <robh+dt@kernel.org>,
"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
"soc@kernel.org" <soc@kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 4/6] bus: Add Baikal-T1 AXI-bus driver
Date: Thu, 28 May 2020 14:14:58 +0200 [thread overview]
Message-ID: <CAK8P3a2WMqTRitUU86hSV3HSK12-hF_RDoFg51PRGTLmXwznvA@mail.gmail.com> (raw)
In-Reply-To: <CAHp75VcfkPPy5YjNrcv8c6doyQz5C47QyREE0v6tfQjXYrBijQ@mail.gmail.com>
On Thu, May 28, 2020 at 12:01 AM Andy Shevchenko
<andy.shevchenko@gmail.com> wrote:
> On Tuesday, May 26, 2020, Serge Semin <Sergey.Semin@baikalelectronics.ru> wrote:
>>
>> AXI3-bus is the main communication bus connecting all high-speed
>> peripheral IP-cores with RAM controller and MIPS P5600 cores on Baikal-T1
>> SoC. Bus traffic arbitration is done by means of DW AMBA 3 AXI
>> Interconnect (so called AXI Main Interconnect) routing IO requests from
>> one SoC block to another. This driver provides a way to detect any bus
>> protocol errors and device not responding situations by means of an
>> embedded on top of the interconnect errors handler block (EHB). AXI
>> Interconnect QoS arbitration tuning is currently unsupported.
>> The bus doesn't provide a way to detect the interconnected devices,
>> so they are supposed to be statically defined like by means of the
>> simple-bus sub-nodes.
>
>
>
> Few comments in case if you need a new version. Main point is about sysfs_streq().
I've applied the patch now and folded in fixes for the build warnings and
errors pointed out by the test robot, but I did not include the changes you
suggested.
Serge, could you send a follow-up patch to address those?
Arnd
next prev parent reply other threads:[~2020-05-28 12:15 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-26 12:59 [PATCH v3 0/6] bus/memory: Add Baikal-T1 SoC APB/AXI/L2 drivers Serge Semin
2020-05-26 12:59 ` [PATCH v3 1/6] dt-bindings: bus: Add Baikal-T1 AXI-bus binding Serge Semin
2020-05-26 12:59 ` [PATCH v3 2/6] dt-bindings: bus: Add Baikal-T1 APB-bus binding Serge Semin
2020-05-26 12:59 ` [PATCH v3 3/6] dt-bindings: memory: Add Baikal-T1 L2-cache Control Block binding Serge Semin
2020-05-26 16:09 ` Rob Herring
2020-05-26 16:12 ` Serge Semin
2020-05-26 12:59 ` [PATCH v3 4/6] bus: Add Baikal-T1 AXI-bus driver Serge Semin
2020-05-27 20:04 ` kbuild test robot
2020-05-27 22:31 ` kbuild test robot
[not found] ` <CAHp75VcfkPPy5YjNrcv8c6doyQz5C47QyREE0v6tfQjXYrBijQ@mail.gmail.com>
2020-05-28 12:14 ` Arnd Bergmann [this message]
2020-05-28 12:27 ` Serge Semin
2020-05-28 12:44 ` Arnd Bergmann
2020-05-28 13:00 ` Serge Semin
2020-05-28 12:37 ` Serge Semin
2020-05-28 13:40 ` Serge Semin
2020-05-28 13:51 ` Andy Shevchenko
2020-05-28 13:56 ` Serge Semin
2020-05-26 12:59 ` [PATCH v3 5/6] bus: Add Baikal-T1 APB-bus driver Serge Semin
2020-05-28 0:32 ` kbuild test robot
2020-05-28 4:51 ` kbuild test robot
2020-05-28 12:17 ` Arnd Bergmann
2020-05-28 13:13 ` Serge Semin
2020-05-26 12:59 ` [PATCH v3 6/6] memory: Add Baikal-T1 L2-cache Control Block driver Serge Semin
2020-05-26 13:08 ` [PATCH v3 0/6] bus/memory: Add Baikal-T1 SoC APB/AXI/L2 drivers Serge Semin
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