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[111.255.104.19]) by smtp.gmail.com with ESMTPSA id j5sm11842535pfn.180.2019.12.24.04.15.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 24 Dec 2019 04:15:13 -0800 (PST) Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Andy Lutomirski Mime-Version: 1.0 (1.0) Subject: Re: [RFC PATCH v2 04/10] lib: vdso: get pointer to vdso data from the arch Date: Tue, 24 Dec 2019 20:15:11 +0800 Message-Id: References: Cc: Andy Lutomirski , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Arnd Bergmann , Thomas Gleixner , Vincenzo Frascino , LKML , linuxppc-dev , linux-arm-kernel , "open list:MIPS" , X86 ML In-Reply-To: To: christophe leroy X-Mailer: iPhone Mail (17C54) Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org > On Dec 24, 2019, at 7:53 PM, christophe leroy wr= ote: >=20 > =EF=BB=BF >=20 >> Le 24/12/2019 =C3=A0 03:27, Andy Lutomirski a =C3=A9crit : >>> On Mon, Dec 23, 2019 at 6:31 AM Christophe Leroy >>> wrote: >>>=20 >>> On powerpc, __arch_get_vdso_data() clobbers the link register, >>> requiring the caller to set a stack frame in order to save it. >>>=20 >>> As the parent function already has to set a stack frame and save >>> the link register to call the C vdso function, retriving the >>> vdso data pointer there is lighter. >> I'm confused. Can't you inline __arch_get_vdso_data()? Or is the >> issue that you can't retrieve the program counter on power without >> clobbering the link register? >=20 > Yes it can be inlined (I did it in V1 https://patchwork.ozlabs.org/patch/1= 180571/), but you can't do it without clobbering the link register, because t= he only way to get the program counter is to do to as if you were calling an= other function but you call to the address which just follows where you are,= so that it sets LR which the simulated return address which corresponds to t= he address following the branch. >=20 > static __always_inline > const struct vdso_data *__arch_get_vdso_data(void) > { > void *ptr; >=20 > asm volatile( > " bcl 20, 31, .+4;\n" > " mflr %0;\n" > " addi %0, %0, __kernel_datapage_offset - (.-4);\n" > : "=3Db"(ptr) : : "lr"); >=20 > return ptr + *(unsigned long *)ptr; > } >=20 >> I would imagine that this patch generates worse code on any >> architecture with PC-relative addressing modes (which includes at >> least x86_64, and I would guess includes most modern architectures). >=20 > Why ? Powerpc is also using PC-relative addressing for all calls but indir= ect calls. I mean PC-relative access for data. The data page is at a constant, known o= ffset from the vDSO text. I haven=E2=80=99t checked how much x86_64 benefits from this, but at least t= he non-array fields ought to be accessible with a PC-relative access. It should be possible to refactor a little bit so that the compiler can stil= l see what=E2=80=99s going on. Maybe your patch actually does this. I=E2=80= =99d want to look at the assembly. This also might not matter much on x86_6= 4 in particular, since x86_64 can convert a PC-relative address to an absolu= te address with a single instruction with no clobbers. Does power have PC-relative data access? If so, I wonder if the code can be= arranged so that even the array accesses don=E2=80=99t require computing an= absolute address at any point.