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From: Paul Cercueil <paul@crapouillou.net>
To: Christophe Branchereau <cbranchereau@gmail.com>
Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org,
	linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org,
	robh+dt@kernel.org, devicetree@vger.kernel.org,
	linux@roeck-us.net, contact@artur-rojek.eu
Subject: Re: [PATCH v3 4/5] iio/adc: ingenic: add JZ4760B support to the sadc driver
Date: Sun, 25 Jul 2021 10:22:34 +0100	[thread overview]
Message-ID: <MDNSWQ.IN488S2UMGEP1@crapouillou.net> (raw)
In-Reply-To: <20210724190449.221894-5-cbranchereau@gmail.com>

Hi Christophe,

Where did the
+ { .compatible = "ingenic,jz4760b-adc", .data = &jz4760_adc_soc_data },

go?

Cheers,
-Paul


Le sam., juil. 24 2021 at 21:04:48 +0200, Christophe Branchereau 
<cbranchereau@gmail.com> a écrit :
> The JZ4760B variant differs slightly from the JZ4760: it has a bit 
> called VBAT_SEL in the CFG register.
> 
> In order to correctly sample the battery voltage on existing 
> handhelds using this SOC, the bit must be cleared.
> 
> We leave the possibility to set the bit, by using the 
> "ingenic,use-internal-divider" in the devicetree.
> 
> Signed-off-by: Christophe Branchereau <cbranchereau@gmail.com>
> ---
>  drivers/iio/adc/ingenic-adc.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/iio/adc/ingenic-adc.c 
> b/drivers/iio/adc/ingenic-adc.c
> index 6b9af0530590..eaa8ab36183c 100644
> --- a/drivers/iio/adc/ingenic-adc.c
> +++ b/drivers/iio/adc/ingenic-adc.c
> @@ -37,6 +37,7 @@
>  #define JZ_ADC_REG_CFG_SAMPLE_NUM(n)	((n) << 10)
>  #define JZ_ADC_REG_CFG_PULL_UP(n)	((n) << 16)
>  #define JZ_ADC_REG_CFG_CMD_SEL		BIT(22)
> +#define JZ_ADC_REG_CFG_VBAT_SEL		BIT(30)
>  #define JZ_ADC_REG_CFG_TOUCH_OPS_MASK	(BIT(31) | GENMASK(23, 10))
>  #define JZ_ADC_REG_ADCLK_CLKDIV_LSB	0
>  #define JZ4725B_ADC_REG_ADCLK_CLKDIV10US_LSB	16
> @@ -879,6 +880,14 @@ static int ingenic_adc_probe(struct 
> platform_device *pdev)
>  	/* Put hardware in a known passive state. */
>  	writeb(0x00, adc->base + JZ_ADC_REG_ENABLE);
>  	writeb(0xff, adc->base + JZ_ADC_REG_CTRL);
> +
> +	/* JZ4760B specific */
> +	if (device_property_present(dev, "ingenic,use-internal-divider"))
> +		ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_VBAT_SEL,
> +					    JZ_ADC_REG_CFG_VBAT_SEL);
> +	else
> +		ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_VBAT_SEL, 0);
> +
>  	usleep_range(2000, 3000); /* Must wait at least 2ms. */
>  	clk_disable(adc->clk);
> 
> --
> 2.30.2
> 



  reply	other threads:[~2021-07-25  9:22 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-24 19:04 [PATCH v3 0/4] iio/adc: ingenic: add support for the JZ4760(B) Socs to the ingenic " Christophe Branchereau
2021-07-24 19:04 ` [PATCH v3 1/5] iio/adc: ingenic: rename has_aux2 to has_aux_md Christophe Branchereau
2021-07-25  9:14   ` Paul Cercueil
2021-07-24 19:04 ` [PATCH v3 2/5] dt-bindings: iio/adc: add an INGENIC_ADC_AUX0 entry Christophe Branchereau
2021-07-25  9:14   ` Paul Cercueil
2021-07-24 19:04 ` [PATCH v3 3/5] iio/adc: ingenic: add JZ4760 support to the sadc driver Christophe Branchereau
2021-07-25  9:16   ` Paul Cercueil
2021-07-24 19:04 ` [PATCH v3 4/5] iio/adc: ingenic: add JZ4760B " Christophe Branchereau
2021-07-25  9:22   ` Paul Cercueil [this message]
2021-07-24 19:04 ` [PATCH v3 5/5] dt-bindings: iio/adc: ingenic: add the JZ4760(B) socs to the sadc Documentation Christophe Branchereau
2021-07-25  9:23   ` Paul Cercueil
2021-07-25 15:22 ` [PATCH v3 0/4] iio/adc: ingenic: add support for the JZ4760(B) Socs to the ingenic sadc driver Jonathan Cameron

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