* [PATCH] MIPS: use FR=1 for FPXX binary
@ 2021-02-20 6:16 YunQiang Su
2021-02-20 6:59 ` Greg KH
0 siblings, 1 reply; 2+ messages in thread
From: YunQiang Su @ 2021-02-20 6:16 UTC (permalink / raw)
To: tsbogend, linux-mips, jiaxun.yang; +Cc: stable, YunQiang Su
some binary, for example the output of golang, may be mark as FPXX,
while in fact they are still FP32.
Since FPXX binary can work with both FR=1 and FR=0, we force it to
use FR=1 here.
https://go-review.googlesource.com/c/go/+/239217
https://go-review.googlesource.com/c/go/+/237058
---
arch/mips/kernel/elf.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/mips/kernel/elf.c b/arch/mips/kernel/elf.c
index 7b045d2a0b51..bf798ce0ec0e 100644
--- a/arch/mips/kernel/elf.c
+++ b/arch/mips/kernel/elf.c
@@ -234,9 +234,10 @@ int arch_check_elf(void *_ehdr, bool has_interpreter, void *_interp_ehdr,
* fpxx case. This is because, in any-ABI (or no-ABI) we have no FPU
* instructions so we don't care about the mode. We will simply use
* the one preferred by the hardware. In fpxx case, that ABI can
- * handle both FR=1 and FR=0, so, again, we simply choose the one
- * preferred by the hardware. Next, if we only use single-precision
- * FPU instructions, and the default ABI FPU mode is not good
+ * handle both FR=1 and FR=0. Here, we use FR=0, because some
+ * binaries may be mark as FPXX by mistake (ie, output of golang).
+ * - If we only use single-precision FPU instructions,
+ * and the default ABI FPU mode is not good
* (ie single + any ABI combination), we set again the FPU mode to the
* one is preferred by the hardware. Next, if we know that the code
* will only use single-precision instructions, shown by single being
@@ -248,8 +249,9 @@ int arch_check_elf(void *_ehdr, bool has_interpreter, void *_interp_ehdr,
*/
if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1)
state->overall_fp_mode = FP_FRE;
- else if ((prog_req.fr1 && prog_req.frdefault) ||
- (prog_req.single && !prog_req.frdefault))
+ else if (prog_req.fr1 && prog_req.frdefault)
+ state->overall_fp_mode = FP_FR0;
+ else if (prog_req.single && !prog_req.frdefault)
/* Make sure 64-bit MIPS III/IV/64R1 will not pick FR1 */
state->overall_fp_mode = ((raw_current_cpu_data.fpu_id & MIPS_FPIR_F64) &&
cpu_has_mips_r2_r6) ?
--
2.20.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] MIPS: use FR=1 for FPXX binary
2021-02-20 6:16 [PATCH] MIPS: use FR=1 for FPXX binary YunQiang Su
@ 2021-02-20 6:59 ` Greg KH
0 siblings, 0 replies; 2+ messages in thread
From: Greg KH @ 2021-02-20 6:59 UTC (permalink / raw)
To: YunQiang Su; +Cc: tsbogend, linux-mips, jiaxun.yang, stable
On Sat, Feb 20, 2021 at 06:16:35AM +0000, YunQiang Su wrote:
> some binary, for example the output of golang, may be mark as FPXX,
> while in fact they are still FP32.
>
> Since FPXX binary can work with both FR=1 and FR=0, we force it to
> use FR=1 here.
>
> https://go-review.googlesource.com/c/go/+/239217
> https://go-review.googlesource.com/c/go/+/237058
> ---
> arch/mips/kernel/elf.c | 12 +++++++-----
> 1 file changed, 7 insertions(+), 5 deletions(-)
<formletter>
This is not the correct way to submit patches for inclusion in the
stable kernel tree. Please read:
https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html
for how to do this properly.
</formletter>
You also forgot to sign off on your patch :(
^ permalink raw reply [flat|nested] 2+ messages in thread
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